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authorChris Lattner <sabre@nondot.org>2002-12-28 20:05:44 +0000
committerChris Lattner <sabre@nondot.org>2002-12-28 20:05:44 +0000
commit7ad6be7b01a902f532eebb607306f7b3f4627718 (patch)
tree5ae9fdefa8d05dbc58a58daead72f8c80f07c5c0 /include/llvm/CodeGen
parentcd0d1d1f0f44773b5c4bb57f557e6187891ff1d5 (diff)
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* Frame indices are signed
* Cluster modification methods together git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5164 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/MachineInstr.h54
1 files changed, 32 insertions, 22 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index a7e00f7227..ab6a137c31 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -203,7 +203,7 @@ public:
assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
return MBB;
}
- unsigned getFrameIndex() const { assert(isFrameIndex()); return immedVal; }
+ int getFrameIndex() const { assert(isFrameIndex()); return immedVal; }
bool opIsUse () const { return (flags & USEDEFMASK) == 0; }
bool opIsDef () const { return flags & DEFFLAG; }
@@ -313,12 +313,6 @@ public:
MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode, unsigned numOps);
- /// replace - Support to rewrite a machine instruction in place: for now,
- /// simply replace() and then set new operands with Set.*Operand methods
- /// below.
- ///
- void replace(MachineOpCode Opcode, unsigned numOperands);
-
// The opcode.
//
const MachineOpCode getOpcode() const { return opCode; }
@@ -338,10 +332,12 @@ public:
return operands[i];
}
+ // FIXME: ELIMINATE
MachineOperand::MachineOperandType getOperandType(unsigned i) const {
return getOperand(i).getType();
}
+ // FIXME: ELIMINATE: Misleading name: Definition not defined.
bool operandIsDefined(unsigned i) const {
return getOperand(i).opIsDef();
}
@@ -401,21 +397,6 @@ public:
typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
- // Access to set the operands when building the machine instruction
- //
- void SetMachineOperandVal (unsigned i,
- MachineOperand::MachineOperandType operandType,
- Value* V,
- bool isDef=false,
- bool isDefAndUse=false);
-
- void SetMachineOperandConst (unsigned i,
- MachineOperand::MachineOperandType operandType,
- int64_t intValue);
-
- void SetMachineOperandReg (unsigned i,
- int regNum,
- bool isDef=false);
//===--------------------------------------------------------------------===//
// Accessors to add operands when building up machine instructions
@@ -519,6 +500,35 @@ public:
operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
}
+
+ //===--------------------------------------------------------------------===//
+ // Accessors used to modify instructions in place.
+ //
+ // FIXME: Move this stuff to MachineOperand itself!
+
+ /// replace - Support to rewrite a machine instruction in place: for now,
+ /// simply replace() and then set new operands with Set.*Operand methods
+ /// below.
+ ///
+ void replace(MachineOpCode Opcode, unsigned numOperands);
+
+ // Access to set the operands when building the machine instruction
+ //
+ void SetMachineOperandVal (unsigned i,
+ MachineOperand::MachineOperandType operandType,
+ Value* V,
+ bool isDef=false,
+ bool isDefAndUse=false);
+
+ void SetMachineOperandConst (unsigned i,
+ MachineOperand::MachineOperandType operandType,
+ int64_t intValue);
+
+ void SetMachineOperandReg (unsigned i,
+ int regNum,
+ bool isDef=false);
+
+
unsigned substituteValue(const Value* oldVal, Value* newVal,
bool defsOnly = true);