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authorChris Lattner <sabre@nondot.org>2009-06-24 17:54:48 +0000
committerChris Lattner <sabre@nondot.org>2009-06-24 17:54:48 +0000
commit31530617dd206c3ac549e98508d8f98e91bf8275 (patch)
tree41f98e59448ada07f5a6cab73749b4b2b26682af /include/llvm/CodeGen/MachineOperand.h
parent8cbc94afb71fd2da72d8f1284f7f53e39019fdec (diff)
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Rearrange some stuff in MachineOperand and add a new TargetFlags field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74087 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineOperand.h')
-rw-r--r--include/llvm/CodeGen/MachineOperand.h25
1 files changed, 18 insertions, 7 deletions
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h
index ba538d795f..64fa1d1ee0 100644
--- a/include/llvm/CodeGen/MachineOperand.h
+++ b/include/llvm/CodeGen/MachineOperand.h
@@ -47,7 +47,14 @@ public:
private:
/// OpKind - Specify what kind of operand this is. This discriminates the
/// union.
- MachineOperandType OpKind : 8;
+ unsigned char OpKind; // MachineOperandType
+
+ /// SubReg - Subregister number, only valid for MO_Register. A value of 0
+ /// indicates the MO_Register has no subReg.
+ unsigned char SubReg;
+
+ /// TargetFlags - This is a set of target-specific operand flags.
+ unsigned char TargetFlags;
/// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
/// operands.
@@ -73,10 +80,6 @@ private:
/// model the GCC inline asm '&' constraint modifier.
bool IsEarlyClobber : 1;
- /// SubReg - Subregister number, only valid for MO_Register. A value of 0
- /// indicates the MO_Register has no subReg.
- unsigned char SubReg;
-
/// ParentMI - This is the instruction that this operand is embedded into.
/// This is valid for all operand types, when the operand is in an instr.
MachineInstr *ParentMI;
@@ -105,7 +108,9 @@ private:
} OffsetedInfo;
} Contents;
- explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {}
+ explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
+ TargetFlags = 0;
+ }
public:
MachineOperand(const MachineOperand &M) {
*this = M;
@@ -115,7 +120,12 @@ public:
/// getType - Returns the MachineOperandType for this operand.
///
- MachineOperandType getType() const { return OpKind; }
+ MachineOperandType getType() const { return (MachineOperandType)OpKind; }
+
+ unsigned char getTargetFlags() const { return TargetFlags; }
+ void setTargetFlags(unsigned char F) { TargetFlags = F; }
+ void addTargetFlag(unsigned char F) { TargetFlags |= F; }
+
/// getParent - Return the instruction that this operand belongs to.
///
@@ -404,6 +414,7 @@ public:
SubReg = MO.SubReg;
ParentMI = MO.ParentMI;
Contents = MO.Contents;
+ TargetFlags = MO.TargetFlags;
return *this;
}