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| author | Jim Grosbach <grosbach@apple.com> | 2010-11-09 18:43:54 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-09 18:43:54 +0000 |
| commit | e0ee08e367b6af33ef005bb1c6389c65453518b3 (patch) | |
| tree | 476897a2ee1848e48b0a71845001543c95614184 | |
| parent | 80f3d786ada3215abe5561ac61d33437e99be3a2 (diff) | |
| download | external_llvm-e0ee08e367b6af33ef005bb1c6389c65453518b3.tar.gz external_llvm-e0ee08e367b6af33ef005bb1c6389c65453518b3.tar.bz2 external_llvm-e0ee08e367b6af33ef005bb1c6389c65453518b3.zip | |
Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118600 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 69f8a6459e..64a3dc73ce 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -851,6 +851,7 @@ multiclass AI_ldr1<bit opc22, string opc, InstrItinClass iii, bits<17> shift; let Inst{23} = shift{12}; // U (add = ('U' == 1)) let Inst{19-16} = shift{16-13}; // Rn + let Inst{15-12} = Rt; let Inst{11-0} = shift{11-0}; } } @@ -879,6 +880,7 @@ multiclass AI_str1<bit opc22, string opc, InstrItinClass iii, bits<17> shift; let Inst{23} = shift{12}; // U (add = ('U' == 1)) let Inst{19-16} = shift{16-13}; // Rn + let Inst{15-12} = Rt; let Inst{11-0} = shift{11-0}; } } |