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| author | Hal Finkel <hfinkel@anl.gov> | 2011-10-14 19:51:36 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2011-10-14 19:51:36 +0000 |
| commit | d712f935f7e027a733741e6ca67b3237a59f65d1 (patch) | |
| tree | 756691d0e5d4805ddc1f884408258f8a7482a6a1 | |
| parent | 1ce2668c8484ce838b5515f519eb484e57058293 (diff) | |
| download | external_llvm-d712f935f7e027a733741e6ca67b3237a59f65d1.tar.gz external_llvm-d712f935f7e027a733741e6ca67b3237a59f65d1.tar.bz2 external_llvm-d712f935f7e027a733741e6ca67b3237a59f65d1.zip | |
Add an implementation of the CanLowerReturn function to the PPC backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141981 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 11 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 6 |
2 files changed, 17 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index cf9f27dda9..d6b8a9ee93 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3416,6 +3416,17 @@ PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee, Ins, InVals); } +bool +PPCTargetLowering::CanLowerReturn(CallingConv::ID CallConv, + MachineFunction &MF, bool isVarArg, + const SmallVectorImpl<ISD::OutputArg> &Outs, + LLVMContext &Context) const { + SmallVector<CCValAssign, 16> RVLocs; + CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), + RVLocs, Context); + return CCInfo.CheckReturn(Outs, RetCC_PPC); +} + SDValue PPCTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index 5f825bdfd3..430e45e804 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -445,6 +445,12 @@ namespace llvm { DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const; + virtual bool + CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, + bool isVarArg, + const SmallVectorImpl<ISD::OutputArg> &Outs, + LLVMContext &Context) const; + virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, |