diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-08-29 06:44:17 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-08-29 06:44:17 +0000 |
| commit | 82a35b34fbf66acc18b9e2d6b46604a3e9a8a2c9 (patch) | |
| tree | eeeb3428c4ccc84012b074d8f34b69de4864a157 | |
| parent | 1efba0ecb4d0b3807c48e6e0f74e3ce5c9fad809 (diff) | |
| download | external_llvm-82a35b34fbf66acc18b9e2d6b46604a3e9a8a2c9.tar.gz external_llvm-82a35b34fbf66acc18b9e2d6b46604a3e9a8a2c9.tar.bz2 external_llvm-82a35b34fbf66acc18b9e2d6b46604a3e9a8a2c9.zip | |
Avoid making unneeded load/mod/store transformation which can hurt performance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29952 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 2dfc763850..0ca063bbae 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -80,6 +80,9 @@ namespace { Statistic<> NumFPKill("x86-codegen", "Number of FP_REG_KILL instructions added"); + Statistic<> + NumLoadMoved("x86-codegen", "Number of loads moved below TokenFactor"); + //===--------------------------------------------------------------------===// /// ISel - X86 specific code to select X86 machine instructions for /// SelectionDAG operations. @@ -313,8 +316,6 @@ void X86DAGToDAGISel::InstructionSelectPreprocess(SelectionDAG &DAG) { switch (Opcode) { case ISD::ADD: case ISD::MUL: - case ISD::FADD: - case ISD::FMUL: case ISD::AND: case ISD::OR: case ISD::XOR: @@ -329,7 +330,8 @@ void X86DAGToDAGISel::InstructionSelectPreprocess(SelectionDAG &DAG) { std::swap(N10, N11); } RModW = RModW && N10.Val->isOperand(Chain.Val) && N10.hasOneUse() && - N10.getOperand(1) == N2; + (N10.getOperand(1) == N2) && + (N10.Val->getValueType(0) == N1.getValueType()); if (RModW) Load = N10; break; @@ -347,15 +349,18 @@ void X86DAGToDAGISel::InstructionSelectPreprocess(SelectionDAG &DAG) { SDOperand N10 = N1.getOperand(0); if (N10.Val->getOpcode() == ISD::LOAD) RModW = N10.Val->isOperand(Chain.Val) && N10.hasOneUse() && - N10.getOperand(1) == N2; + (N10.getOperand(1) == N2) && + (N10.Val->getValueType(0) == N1.getValueType()); if (RModW) Load = N10; break; } } - if (RModW) + if (RModW) { MoveBelowTokenFactor(DAG, Load, SDOperand(I, 0), Chain); + ++NumLoadMoved; + } } } |