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author | Chris Lattner <sabre@nondot.org> | 2003-08-05 21:55:20 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2003-08-05 21:55:20 +0000 |
commit | 610234d5c9582e2645738ad9c347b855962122b7 (patch) | |
tree | 2bcb50d6af5e7a0bdc94e576b7e0cd585e2e527d | |
parent | cb048097c9db34307ad57d5dc22a7cacf30ac421 (diff) | |
download | external_llvm-610234d5c9582e2645738ad9c347b855962122b7.tar.gz external_llvm-610234d5c9582e2645738ad9c347b855962122b7.tar.bz2 external_llvm-610234d5c9582e2645738ad9c347b855962122b7.zip |
Do not insert physical regsiters into the regsUsed set
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7617 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 2 | ||||
-rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 3 |
2 files changed, 0 insertions, 5 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index d26f676a6e..faa213bf26 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -530,7 +530,6 @@ public: "Trying to add an operand to a machine instr that is already done!"); operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister, isDef ? MOTy::Def : MOTy::Use)); - insertUsedReg(reg); } /// addMachineRegOperand - Add a virtual register operand to this MachineInstr @@ -540,7 +539,6 @@ public: "Trying to add an operand to a machine instr that is already done!"); operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy)); - insertUsedReg(reg); } /// addZeroExtImmOperand - Add a zero extended constant argument to the diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 904a412add..8678d14e0e 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -111,7 +111,6 @@ void MachineInstr::SetMachineOperandReg(unsigned i, int regNum) { operands[i].opType = MachineOperand::MO_MachineRegister; operands[i].value = NULL; operands[i].regNum = regNum; - insertUsedReg(regNum); } void @@ -119,14 +118,12 @@ MachineInstr::SetRegForOperand(unsigned i, int regNum) { assert(i < getNumOperands()); // must be explicit op operands[i].setRegForValue(regNum); - insertUsedReg(regNum); } void MachineInstr::SetRegForImplicitRef(unsigned i, int regNum) { getImplicitOp(i).setRegForValue(regNum); - insertUsedReg(regNum); } |