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| author | Chandler Carruth <chandlerc@gmail.com> | 2011-12-24 11:46:10 +0000 |
|---|---|---|
| committer | Chandler Carruth <chandlerc@gmail.com> | 2011-12-24 11:46:10 +0000 |
| commit | 3d636ea8edf9332ab5ab2d92f7ea5c7444e88757 (patch) | |
| tree | 6fd0dafe4fde866ef087efe76afb65946d7685e5 | |
| parent | 9d2051f7fa1b10c4c768e02948365fbc5d80422a (diff) | |
| download | external_llvm-3d636ea8edf9332ab5ab2d92f7ea5c7444e88757.tar.gz external_llvm-3d636ea8edf9332ab5ab2d92f7ea5c7444e88757.tar.bz2 external_llvm-3d636ea8edf9332ab5ab2d92f7ea5c7444e88757.zip | |
Add systematic testing for cttz as well, and fix the bug I spotted by
inspection earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147250 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/X86/clz.ll | 30 |
2 files changed, 32 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 049e3cd842..8aa62d25d7 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -379,9 +379,9 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) setOperationAction(ISD::FREM , MVT::f80 , Expand); setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom); - setOperationAction(ISD::CTTZ_ZERO_UNDEF , MVT::i8 , Expand); if (Subtarget->hasBMI()) { setOperationAction(ISD::CTTZ , MVT::i8 , Promote); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8 , Expand); setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16 , Expand); setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand); if (Subtarget->is64Bit()) @@ -390,6 +390,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) setOperationAction(ISD::CTTZ , MVT::i8 , Custom); setOperationAction(ISD::CTTZ , MVT::i16 , Custom); setOperationAction(ISD::CTTZ , MVT::i32 , Custom); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8 , Promote); if (Subtarget->is64Bit()) setOperationAction(ISD::CTTZ , MVT::i64 , Custom); } diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll index bcba9da115..6f4d305385 100644 --- a/test/CodeGen/X86/clz.ll +++ b/test/CodeGen/X86/clz.ll @@ -1,11 +1,32 @@ ; RUN: llc < %s -march=x86-64 -mcpu=yonah | FileCheck %s +declare i8 @llvm.cttz.i8(i8, i1) +declare i16 @llvm.cttz.i16(i16, i1) declare i32 @llvm.cttz.i32(i32, i1) +declare i64 @llvm.cttz.i64(i64, i1) declare i8 @llvm.ctlz.i8(i8, i1) declare i16 @llvm.ctlz.i16(i16, i1) declare i32 @llvm.ctlz.i32(i32, i1) declare i64 @llvm.ctlz.i64(i64, i1) +define i8 @cttz_i8(i8 %x) { + %tmp = call i8 @llvm.cttz.i8( i8 %x, i1 true ) + ret i8 %tmp +; CHECK: cttz_i8: +; CHECK: bsfw +; CHECK-NOT: cmov +; CHECK: ret +} + +define i16 @cttz_i16(i16 %x) { + %tmp = call i16 @llvm.cttz.i16( i16 %x, i1 true ) + ret i16 %tmp +; CHECK: cttz_i16: +; CHECK: bsfw +; CHECK-NOT: cmov +; CHECK: ret +} + define i32 @cttz_i32(i32 %x) { %tmp = call i32 @llvm.cttz.i32( i32 %x, i1 true ) ret i32 %tmp @@ -15,6 +36,15 @@ define i32 @cttz_i32(i32 %x) { ; CHECK: ret } +define i64 @cttz_i64(i64 %x) { + %tmp = call i64 @llvm.cttz.i64( i64 %x, i1 true ) + ret i64 %tmp +; CHECK: cttz_i64: +; CHECK: bsfq +; CHECK-NOT: cmov +; CHECK: ret +} + define i8 @ctlz_i8(i8 %x) { entry: %tmp2 = call i8 @llvm.ctlz.i8( i8 %x, i1 true ) |