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author | Craig Topper <craig.topper@gmail.com> | 2011-12-05 07:27:14 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2011-12-05 07:27:14 +0000 |
commit | 1dc0fbc168de60c0cbb2b57e936b8a3313887fcb (patch) | |
tree | f3e94ef28d99df752387bb3670b8208a1e8f0d72 | |
parent | beabc6cc6de617a339c740fe4f1e5870c03dacbe (diff) | |
download | external_llvm-1dc0fbc168de60c0cbb2b57e936b8a3313887fcb.tar.gz external_llvm-1dc0fbc168de60c0cbb2b57e936b8a3313887fcb.tar.bz2 external_llvm-1dc0fbc168de60c0cbb2b57e936b8a3313887fcb.zip |
Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145804 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 398cb250b0..a67d27568d 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3217,7 +3217,7 @@ bool X86::isPSHUFLWMask(ShuffleVectorSDNode *N) { static bool isPALIGNRMask(const SmallVectorImpl<int> &Mask, EVT VT, bool hasSSSE3OrAVX) { int i, e = VT.getVectorNumElements(); - if (VT.getSizeInBits() != 128 && VT.getSizeInBits() != 64) + if (VT.getSizeInBits() != 128) return false; // Do not handle v2i64 / v2f64 shuffles with palignr. @@ -11244,7 +11244,7 @@ X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const { // Very little shuffling can be done for 64-bit vectors right now. if (VT.getSizeInBits() == 64) - return isPALIGNRMask(M, VT, Subtarget->hasSSSE3orAVX()); + return false; // FIXME: pshufb, blends, shifts. return (VT.getVectorNumElements() == 2 || |