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| author | Michal Simek <monstr@monstr.eu> | 2007-09-24 00:19:48 +0200 |
|---|---|---|
| committer | Michal Simek <monstr@monstr.eu> | 2007-09-24 00:19:48 +0200 |
| commit | 0731933ec8ec45d02ba89b52df673d526873cdde (patch) | |
| tree | 1c6904dbca4533167381d615e350773f5d75b1cd /cpu/microblaze | |
| parent | db14d77995ce515b728b178b63f82babe60e3d56 (diff) | |
| download | device_goldelico_gta04_u-boot-0731933ec8ec45d02ba89b52df673d526873cdde.tar.gz device_goldelico_gta04_u-boot-0731933ec8ec45d02ba89b52df673d526873cdde.tar.bz2 device_goldelico_gta04_u-boot-0731933ec8ec45d02ba89b52df673d526873cdde.zip | |
[FIX] resolve problem with cpu without barrel shifter
Diffstat (limited to 'cpu/microblaze')
| -rw-r--r-- | cpu/microblaze/start.S | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 3c027ff9b..8740284ad 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -33,15 +33,13 @@ _start: addi r1, r0, CFG_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb000 /* hex b000 opcode imm */ - bslli r6, r6, 16 /* shift */ + addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ swi r6, r0, 0x0 /* reset address */ swi r6, r0, 0x8 /* user vector exception */ swi r6, r0, 0x10 /* interrupt */ swi r6, r0, 0x20 /* hardware exception */ - addi r6, r0, 0xb808 /* hew b808 opcode brai*/ - bslli r6, r6, 16 + addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ swi r6, r0, 0x4 /* reset address */ swi r6, r0, 0xC /* user vector exception */ swi r6, r0, 0x14 /* interrupt */ |