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| author | Wolfgang Wegner <w.wegner@astro-kom.de> | 2010-03-30 19:20:31 +0100 |
|---|---|---|
| committer | TsiChung Liew <tsicliew@gmail.com> | 2010-05-28 02:15:51 -0500 |
| commit | e9b43cae1a20af13d1baeb13038b3f34905c14b5 (patch) | |
| tree | 10267df2109bccd225e41c9ec0dc445ea732a641 /arch/m68k | |
| parent | 01f03bda5b22e5aeae5f02fd537da97a41485c73 (diff) | |
| download | bootable_bootloader_goldelico_gta04-e9b43cae1a20af13d1baeb13038b3f34905c14b5.tar.gz bootable_bootloader_goldelico_gta04-e9b43cae1a20af13d1baeb13038b3f34905c14b5.tar.bz2 bootable_bootloader_goldelico_gta04-e9b43cae1a20af13d1baeb13038b3f34905c14b5.zip | |
add missing PCS3 for MCF5445x
This patch adds the code for handling PCS3 (DSPI chip select 3) in
cpu_init.c and m5445x.h
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
Diffstat (limited to 'arch/m68k')
| -rw-r--r-- | arch/m68k/cpu/mcf5445x/cpu_init.c | 7 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5445x.h | 1 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 8d51d35d6..259985f06 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -238,6 +238,10 @@ int cfspi_claim_bus(uint bus, uint cs) gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2; gpio->par_dspi |= GPIO_PAR_DSPI_PCS2_PCS2; break; + case 3: + gpio->par_dma &= GPIO_PAR_DMA_DACK0_UNMASK; + gpio->par_dma |= GPIO_PAR_DMA_DACK0_PCS3; + break; case 5: gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5; gpio->par_dspi |= GPIO_PAR_DSPI_PCS5_PCS5; @@ -264,6 +268,9 @@ void cfspi_release_bus(uint bus, uint cs) case 2: gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2; break; + case 3: + gpio->par_dma &= GPIO_PAR_DMA_DACK0_UNMASK; + break; case 5: gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5; break; diff --git a/arch/m68k/include/asm/m5445x.h b/arch/m68k/include/asm/m5445x.h index dfddde62a..c575b8f4c 100644 --- a/arch/m68k/include/asm/m5445x.h +++ b/arch/m68k/include/asm/m5445x.h @@ -314,6 +314,7 @@ #define GPIO_PAR_DMA_DREQ1_GPIO (0x00) #define GPIO_PAR_DMA_DACK0_UNMASK (0xF3) #define GPIO_PAR_DMA_DACK0_DACK1 (0x0C) +#define GPIO_PAR_DMA_DACK0_PCS3 (0x08) #define GPIO_PAR_DMA_DACK0_ULPI_DIR (0x04) #define GPIO_PAR_DMA_DACK0_GPIO (0x00) #define GPIO_PAR_DMA_DREQ0_DREQ0 (0x01) |