summaryrefslogtreecommitdiffstats
path: root/disassembler
Commit message (Expand)AuthorAgeFilesLines
* C++17 compatibility: make WITH_TIDY=1 happy again.Elliott Hughes2018-11-291-1/+1
* Use unified libvixl(d) instead of per-supported-arch libvixl(d)-arm(64).Roland Levillain2018-11-061-4/+2
* Conditionally compile/link ARM & ARM64 disassemblers based on targeted archs.Roland Levillain2018-11-061-2/+30
* Conditionally include ARM disassemblers based on targeted archs.Roland Levillain2018-11-061-19/+44
* ART: Refactor for bugprone-argument-commentAndreas Gampe2018-10-091-2/+2
* Revert^2 "ART: Refactor typedef to using"Andreas Gampe2018-09-201-6/+6
* Revert "ART: Refactor typedef to using"Andreas Gampe2018-09-201-6/+6
* ART: Refactor typedef to usingAndreas Gampe2018-09-191-6/+6
* Use 'final' and 'override' specifiers directly in ART.Roland Levillain2018-08-285-23/+23
* Disassemble saturation arithmetic x86/x86_64.Aart Bik2018-03-121-0/+16
* MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount()Lena Djokic2018-03-071-0/+1
* Header library to remove dependence on runtime/David Sehr2018-02-281-0/+3
* Merge "ARM: Fix breaking changes from recent VIXL update."Roland Levillain2018-01-081-6/+20
|\
| * ARM: Fix breaking changes from recent VIXL update.Artem Serov2017-12-181-6/+20
* | MIPS: InstructionCodeGeneratorMIPS*::DivRemByPowerOfTwo()Lena Djokic2018-01-031-0/+5
|/
* MIPS: Add asub_s/u.dfLena Djokic2017-11-081-0/+2
* ART: Make InstructionSet an enum class and add kLast.Vladimir Marko2017-11-021-6/+6
* MIPS: Introduce a few MSA instructionsLena Djokic2017-10-191-0/+33
* Simplify Android.bp filesDan Willemsen2017-09-271-1/+0
* Merge "MIPS: Eliminate hard-coded offsets in branches"Treehugger Robot2017-08-171-9/+19
|\
| * MIPS: Eliminate hard-coded offsets in branchesAlexey Frunze2017-07-301-9/+19
* | Bunch of SIMD for x86 and x86_64Aart Bik2017-08-111-0/+5
|/
* MIPS: Add maddv/msubv MSA instructionsLena Djokic2017-07-251-0/+4
* ART: Include cleanupAndreas Gampe2017-07-241-1/+1
* MIPS: Print register names instead of register numbers in disassemblerGoran Jakovljevic2017-07-103-11/+38
* MIPS64: Add min/max MSA instructionsGoran Jakovljevic2017-06-071-0/+6
* ART: Fix soong defaults orderAndreas Gampe2017-05-241-1/+1
* Merge "Min/max SIMDization support."Aart Bik2017-05-161-1/+65
|\
| * Min/max SIMDization support.Aart Bik2017-05-151-1/+65
* | MIPS64: Add ilvr.df MSA instructionsGoran Jakovljevic2017-05-111-0/+1
|/
* MIPS64: Add add_a.df, ave_s/u.df and aver_s/u.df MSA instructionsGoran Jakovljevic2017-04-211-0/+5
* Merge "SIMD pcmpgtb,w,d,q for x86/x86_64"Treehugger Robot2017-04-041-0/+32
|\
| * SIMD pcmpgtb,w,d,q for x86/x86_64Aart Bik2017-04-041-0/+32
* | Merge "MIPS64: Add ldi.df MSA instruction"Aart Bik2017-04-031-0/+15
|\ \ | |/ |/|
| * MIPS64: Add ldi.df MSA instructionGoran Jakovljevic2017-03-311-0/+15
* | SIMD pavgb,w for x86/x86_64Aart Bik2017-03-311-0/+16
|/
* Properly disassemble cmpeq for x86/x86_64Aart Bik2017-03-221-0/+18
* Revert "Revert "Introduce a number of MSA instructions for MIPS64""Goran Jakovljevic2017-03-171-0/+138
* Revert "Introduce a number of MSA instructions for MIPS64"Aart Bik2017-03-151-138/+0
* Introduce a number of MSA instructions for MIPS64Goran Jakovljevic2017-03-141-0/+138
* x86/string compression: Use TESTB instead of TESTL in String.charAt().Vladimir Marko2017-02-171-1/+1
* Added a few integral SIMD extensions for x86/x86_64 (SSE).Aart Bik2017-02-131-0/+16
* Merge "MIPS64: java.lang.String.getChars"Treehugger Robot2017-01-031-0/+5
|\
| * MIPS64: java.lang.String.getCharsChris Larsen2016-12-021-0/+5
* | MIPS64: Improve method invocation.Alexey Frunze2016-12-131-14/+23
|/
* ARM: VIXL32: Fix breaking changes from recent VIXL update.Scott Wakeling2016-11-251-22/+13
* MIPS32: Implement HSelectAlexey Frunze2016-10-201-0/+4
* ARM64: Update the disassembler after the VIXL update.Alexandre Rames2016-09-271-2/+2
* ARM: VIXL32: Implement a disassembler.Anton Kirilov2016-09-163-1897/+194
* ART: Remove libart from disassemblerAndreas Gampe2016-09-121-4/+2
generated by cgit v1.2.3 (git 2.25.1) at 2026-08-31 04:23:50 +0000