3 files changed, 9 insertions, 12 deletions
diff --git a/compiler/dex/quick/arm/assemble_arm.cc b/compiler/dex/quick/arm/assemble_arm.cc
index 57ebca67e8..7751676c9d 100644
--- a/compiler/dex/quick/arm/assemble_arm.cc
+++ b/compiler/dex/quick/arm/assemble_arm.cc
@@ -1084,7 +1084,7 @@ void ArmMir2Lir::InsertFixupBefore(LIR* prev_lir, LIR* orig_lir, LIR* new_lir) {
 
 uint32_t ArmMir2Lir::ProcessMoreEncodings(const ArmEncodingMap* encoder, int i, uint32_t operand) {
     LOG(FATAL) << "Bad fmt:" << encoder->field_loc[i].kind << " " << operand;
-    uint32_t value=0;
+    uint32_t value = 0;
     return value;
 }
 
diff --git a/compiler/dex/quick/arm/codegen_arm.h b/compiler/dex/quick/arm/codegen_arm.h
index 2fee96ddb8..3ae8790704 100644
--- a/compiler/dex/quick/arm/codegen_arm.h
+++ b/compiler/dex/quick/arm/codegen_arm.h
@@ -282,7 +282,7 @@ class ArmMir2Lir FINAL : public Mir2Lir {
     LIR* InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) OVERRIDE;
     size_t GetInstructionOffset(LIR* lir);
     void GenMoreMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) QC_WEAK;
-    //void MachineSpecificPreprocessMIR(BasicBlock* bb, MIR* mir);
+    // void MachineSpecificPreprocessMIR(BasicBlock* bb, MIR* mir);
 
     void GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) OVERRIDE;
 
@@ -290,6 +290,7 @@ class ArmMir2Lir FINAL : public Mir2Lir {
                           RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
 
     void CleanupCodeGenData() QC_WEAK;
+
   private:
     void GenNegLong(RegLocation rl_dest, RegLocation rl_src);
     void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
@@ -379,8 +380,7 @@ class ArmMir2Lir FINAL : public Mir2Lir {
     friend class QCArmMir2Lir;
 
     public:
-    QCArmMir2Lir * qcm2l ;
-
+    QCArmMir2Lir * qcm2l;
 };
 
 }  // namespace art
diff --git a/compiler/dex/quick/arm/target_arm.cc b/compiler/dex/quick/arm/target_arm.cc
index 6702f79a33..fd16bb874b 100644
--- a/compiler/dex/quick/arm/target_arm.cc
+++ b/compiler/dex/quick/arm/target_arm.cc
@@ -140,9 +140,8 @@ ResourceMask ArmMir2Lir::GetRegMaskCommon(const RegStorage& reg) const {
   return GetRegMaskArm(reg);
 }
 
-void ArmMir2Lir::CompilerPostInitializeRegAlloc()
-{
-    //nothing here
+void ArmMir2Lir::CompilerPostInitializeRegAlloc() {
+    // nothing here
 }
 
 constexpr ResourceMask ArmMir2Lir::GetRegMaskArm(RegStorage reg) {
@@ -597,13 +596,11 @@ ArmMir2Lir::ArmMir2Lir(CompilationUnit* cu, MIRGraph* mir_graph, ArenaAllocator*
   ArmMir2LirPostInit(this);
 }
 
-ArmMir2Lir::~ArmMir2Lir()
-{
+ArmMir2Lir::~ArmMir2Lir() {
   CleanupCodeGenData();
 }
 
-void ArmMir2Lir::CleanupCodeGenData()
-{
+void ArmMir2Lir::CleanupCodeGenData() {
 }
 
 void ArmMir2Lir::ArmMir2LirPostInit(ArmMir2Lir*) {
@@ -1036,7 +1033,7 @@ void ArmMir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) {
       // LOG(FATAL) << "Unexpected opcode: " << mir->dalvikInsn.opcode;
   }
 }
-void ArmMir2Lir::GenMoreMachineSpecificExtendedMethodMIR(BasicBlock*, MIR*){
+void ArmMir2Lir::GenMoreMachineSpecificExtendedMethodMIR(BasicBlock*, MIR*) {
     // nothing here
 }