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authorHiroshi Yamauchi <yamauchi@google.com>2015-02-23 11:14:40 -0800
committerHiroshi Yamauchi <yamauchi@google.com>2015-02-23 11:25:51 -0800
commit9e47bfa71d42df101aff9d156a1b296eaf6566a2 (patch)
tree5122555b45668ab6cf0037772ffb50aacf46142e /runtime/indirect_reference_table.h
parentd98ff78976696fdde1e7868d4687719a0439544b (diff)
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Avoid unaligned accesses (SIGBUG/BUS_ADRALN) in IRT.
Pointers in IrtEntry aren't currently aligned under 64 bit builds. But unaligned atomic stores (store exclusive) do not work on arm64 (causes SIGBUG/BUS_ADRALN). Fix CC collector crashes caused by this. Bug: 12687968 Change-Id: I1d2f5376778a9a1e5cfea876f1f57d7a88ad5445
Diffstat (limited to 'runtime/indirect_reference_table.h')
-rw-r--r--runtime/indirect_reference_table.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/runtime/indirect_reference_table.h b/runtime/indirect_reference_table.h
index 7f7870a412..576a60477e 100644
--- a/runtime/indirect_reference_table.h
+++ b/runtime/indirect_reference_table.h
@@ -197,7 +197,7 @@ union IRTSegmentState {
// Contains multiple entries but only one active one, this helps us detect use after free errors
// since the serial stored in the indirect ref wont match.
static const size_t kIRTPrevCount = kIsDebugBuild ? 7 : 3;
-class PACKED(4) IrtEntry {
+class IrtEntry {
public:
void Add(mirror::Object* obj) SHARED_LOCKS_REQUIRED(Locks::mutator_lock_) {
++serial_;
@@ -218,6 +218,8 @@ class PACKED(4) IrtEntry {
uint32_t serial_;
GcRoot<mirror::Object> references_[kIRTPrevCount];
};
+static_assert(sizeof(IrtEntry) == (1 + kIRTPrevCount) * sizeof(uintptr_t),
+ "Unexpected sizeof(IrtEntry)");
class IrtIterator {
public: