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authorSebastien Hertz <shertz@google.com>2013-07-25 10:04:29 +0200
committerSebastien Hertz <shertz@google.com>2013-07-25 10:17:21 +0200
commitb0f3f485c81266feff536ecafe26c164d21c5a43 (patch)
tree1722fafa7e56c7234eceb9c7bfaeb3e50919f331 /runtime/dex_instruction.h
parent08524597899d0bb021c9165218deff51dc88da50 (diff)
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Avoid fetching instruction's first 16 bits twice.
The first instruction's 16 bits share the instruction's opcode and one or two operands (depending on the instruction format). In the main interpreter loop, we first load the first 16 bits of the instruction and keep only the low 8 bits of the opcode. Then we read the high 8 bits containing one 8-bits operand (vAA) or two 4-bits operands (vA and vB). But currently, the GCC compiler does not make the link with the opcode and reload the first 16 bits while a physical register already hold them. This CL updates the Instruction::Opcode to use the Instruction::Fetch method so the compiler makes the link between opcode and operand(s) and avoids loading twice in most of instruction handling sequences. Unfortunately, this does not fix all sequences and a few instructions remain with this redundant 16-bits load. Sounds like we may not have enough control to help the compiler do the right thing everytime. Change-Id: Id2b22747409fc5e9d9735e400ec6e1ab40d2ea68
Diffstat (limited to 'runtime/dex_instruction.h')
-rw-r--r--runtime/dex_instruction.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/runtime/dex_instruction.h b/runtime/dex_instruction.h
index aea33716a6..137de76c8e 100644
--- a/runtime/dex_instruction.h
+++ b/runtime/dex_instruction.h
@@ -281,9 +281,7 @@ class Instruction {
// Returns the opcode field of the instruction.
Code Opcode() const {
- const uint16_t* insns = reinterpret_cast<const uint16_t*>(this);
- int opcode = *insns & 0xFF;
- return static_cast<Code>(opcode);
+ return static_cast<Code>(Fetch16(0) & 0xFF);
}
void SetOpcode(Code opcode) {