[optimizing] Improve x86 shifts

Support memory operands for integer shifts.  Generate better code for
long shifts by constants.

Change-Id: Icc92fa1b59cc280d4894af6f054e19b01977d5ce
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>

1 files changed, 136 insertions, 26 deletions

diff --git a/compiler/optimizing/code_generator_x86.cc b/compiler/optimizing/code_generator_x86.cc
index 845c6c25fc..ed47f6524d 100644
--- a/compiler/optimizing/code_generator_x86.cc
+++ b/compiler/optimizing/code_generator_x86.cc
@@ -2713,16 +2713,16 @@ void LocationsBuilderX86::HandleShift(HBinaryOperation* op) {
 
   switch (op->GetResultType()) {
     case Primitive::kPrimInt: {
-      locations->SetInAt(0, Location::RequiresRegister());
-      // The shift count needs to be in CL.
+      locations->SetInAt(0, Location::Any());
+      // The shift count needs to be in CL or a constant.
       locations->SetInAt(1, Location::ByteRegisterOrConstant(ECX, op->InputAt(1)));
       locations->SetOut(Location::SameAsFirstInput());
       break;
     }
     case Primitive::kPrimLong: {
       locations->SetInAt(0, Location::RequiresRegister());
-      // The shift count needs to be in CL.
-      locations->SetInAt(1, Location::RegisterLocation(ECX));
+      // The shift count needs to be in CL or a constant.
+      locations->SetInAt(1, Location::ByteRegisterOrConstant(ECX, op->InputAt(1)));
       locations->SetOut(Location::SameAsFirstInput());
       break;
     }
@@ -2741,38 +2741,87 @@ void InstructionCodeGeneratorX86::HandleShift(HBinaryOperation* op) {
 
   switch (op->GetResultType()) {
     case Primitive::kPrimInt: {
-      Register first_reg = first.AsRegister<Register>();
-      if (second.IsRegister()) {
-        Register second_reg = second.AsRegister<Register>();
-        DCHECK_EQ(ECX, second_reg);
-        if (op->IsShl()) {
-          __ shll(first_reg, second_reg);
-        } else if (op->IsShr()) {
-          __ sarl(first_reg, second_reg);
+      if (first.IsRegister()) {
+        Register first_reg = first.AsRegister<Register>();
+        if (second.IsRegister()) {
+          Register second_reg = second.AsRegister<Register>();
+          DCHECK_EQ(ECX, second_reg);
+          if (op->IsShl()) {
+            __ shll(first_reg, second_reg);
+          } else if (op->IsShr()) {
+            __ sarl(first_reg, second_reg);
+          } else {
+            __ shrl(first_reg, second_reg);
+          }
         } else {
-          __ shrl(first_reg, second_reg);
+          int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue;
+          if (shift == 0) {
+            return;
+          }
+          Immediate imm(shift);
+          if (op->IsShl()) {
+            __ shll(first_reg, imm);
+          } else if (op->IsShr()) {
+            __ sarl(first_reg, imm);
+          } else {
+            __ shrl(first_reg, imm);
+          }
         }
       } else {
-        Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue);
-        if (op->IsShl()) {
-          __ shll(first_reg, imm);
-        } else if (op->IsShr()) {
-          __ sarl(first_reg, imm);
+        DCHECK(first.IsStackSlot()) << first;
+        Address addr(ESP, first.GetStackIndex());
+        if (second.IsRegister()) {
+          Register second_reg = second.AsRegister<Register>();
+          DCHECK_EQ(ECX, second_reg);
+          if (op->IsShl()) {
+            __ shll(addr, second_reg);
+          } else if (op->IsShr()) {
+            __ sarl(addr, second_reg);
+          } else {
+            __ shrl(addr, second_reg);
+          }
         } else {
-          __ shrl(first_reg, imm);
+          int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue;
+          if (shift == 0) {
+            return;
+          }
+          Immediate imm(shift);
+          if (op->IsShl()) {
+            __ shll(addr, imm);
+          } else if (op->IsShr()) {
+            __ sarl(addr, imm);
+          } else {
+            __ shrl(addr, imm);
+          }
         }
       }
+
       break;
     }
     case Primitive::kPrimLong: {
-      Register second_reg = second.AsRegister<Register>();
-      DCHECK_EQ(ECX, second_reg);
-      if (op->IsShl()) {
-        GenerateShlLong(first, second_reg);
-      } else if (op->IsShr()) {
-        GenerateShrLong(first, second_reg);
+      if (second.IsRegister()) {
+        Register second_reg = second.AsRegister<Register>();
+        DCHECK_EQ(ECX, second_reg);
+        if (op->IsShl()) {
+          GenerateShlLong(first, second_reg);
+        } else if (op->IsShr()) {
+          GenerateShrLong(first, second_reg);
+        } else {
+          GenerateUShrLong(first, second_reg);
+        }
       } else {
-        GenerateUShrLong(first, second_reg);
+        // Shift by a constant.
+        int shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftValue;
+        // Nothing to do if the shift is 0, as the input is already the output.
+        if (shift != 0) {
+          if (op->IsShl()) {
+            GenerateShlLong(first, shift);
+          } else if (op->IsShr()) {
+            GenerateShrLong(first, shift);
+          } else {
+            GenerateUShrLong(first, shift);
+          }
+        }
       }
       break;
     }
@@ -2781,6 +2830,26 @@ void InstructionCodeGeneratorX86::HandleShift(HBinaryOperation* op) {
   }
 }
 
+void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, int shift) {
+  Register low = loc.AsRegisterPairLow<Register>();
+  Register high = loc.AsRegisterPairHigh<Register>();
+  if (shift == 32) {
+    // Shift by 32 is easy. High gets low, and low gets 0.
+    codegen_->EmitParallelMoves(
+        loc.ToLow(), loc.ToHigh(),
+        Location::ConstantLocation(GetGraph()->GetIntConstant(0)), loc.ToLow());
+  } else if (shift > 32) {
+    // Low part becomes 0.  High part is low part << (shift-32).
+    __ movl(high, low);
+    __ shll(high, Immediate(shift - 32));
+    __ xorl(low, low);
+  } else {
+    // Between 1 and 31.
+    __ shld(high, low, Immediate(shift));
+    __ shll(low, Immediate(shift));
+  }
+}
+
 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register shifter) {
   Label done;
   __ shld(loc.AsRegisterPairHigh<Register>(), loc.AsRegisterPairLow<Register>(), shifter);
@@ -2792,6 +2861,27 @@ void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register
   __ Bind(&done);
 }
 
+void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, int shift) {
+  Register low = loc.AsRegisterPairLow<Register>();
+  Register high = loc.AsRegisterPairHigh<Register>();
+  if (shift == 32) {
+    // Need to copy the sign.
+    DCHECK_NE(low, high);
+    __ movl(low, high);
+    __ sarl(high, Immediate(31));
+  } else if (shift > 32) {
+    DCHECK_NE(low, high);
+    // High part becomes sign. Low part is shifted by shift - 32.
+    __ movl(low, high);
+    __ sarl(high, Immediate(31));
+    __ shrl(low, Immediate(shift - 32));
+  } else {
+    // Between 1 and 31.
+    __ shrd(low, high, Immediate(shift));
+    __ sarl(high, Immediate(shift));
+  }
+}
+
 void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register shifter) {
   Label done;
   __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter);
@@ -2803,6 +2893,26 @@ void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register
   __ Bind(&done);
 }
 
+void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, int shift) {
+  Register low = loc.AsRegisterPairLow<Register>();
+  Register high = loc.AsRegisterPairHigh<Register>();
+  if (shift == 32) {
+    // Shift by 32 is easy. Low gets high, and high gets 0.
+    codegen_->EmitParallelMoves(
+        loc.ToHigh(), loc.ToLow(),
+        Location::ConstantLocation(GetGraph()->GetIntConstant(0)), loc.ToHigh());
+  } else if (shift > 32) {
+    // Low part is high >> (shift - 32). High part becomes 0.
+    __ movl(low, high);
+    __ shrl(low, Immediate(shift - 32));
+    __ xorl(high, high);
+  } else {
+    // Between 1 and 31.
+    __ shrd(low, high, Immediate(shift));
+    __ shrl(high, Immediate(shift));
+  }
+}
+
 void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, Register shifter) {
   Label done;
   __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter);