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| author | Aart Bik <ajcbik@google.com> | 2017-04-03 14:35:41 -0700 |
|---|---|---|
| committer | Aart Bik <ajcbik@google.com> | 2017-04-05 09:24:01 -0700 |
| commit | 6daebeba6ceab4e7dff5a3d65929eeac9a334004 (patch) | |
| tree | 6aa2948896c6a731531451840a9a8bb26854cdd8 /compiler/optimizing/code_generator_vector_arm_vixl.cc | |
| parent | 7cd18fb5a7ce83d98b1bbc3c55583fc5f93dc16f (diff) | |
| download | art-6daebeba6ceab4e7dff5a3d65929eeac9a334004.tar.gz art-6daebeba6ceab4e7dff5a3d65929eeac9a334004.tar.bz2 art-6daebeba6ceab4e7dff5a3d65929eeac9a334004.zip | |
Implemented ABS vectorization.
Rationale:
This CL adds the concept of vectorizing intrinsics
to the ART vectorizer. More can follow (MIN, MAX, etc).
Test: test-art-host, test-art-target (angler)
Change-Id: Ieed8aa83ec64c1250ac0578570249cce338b5d36
Diffstat (limited to 'compiler/optimizing/code_generator_vector_arm_vixl.cc')
| -rw-r--r-- | compiler/optimizing/code_generator_vector_arm_vixl.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/optimizing/code_generator_vector_arm_vixl.cc b/compiler/optimizing/code_generator_vector_arm_vixl.cc index 171198902d..74fa584e09 100644 --- a/compiler/optimizing/code_generator_vector_arm_vixl.cc +++ b/compiler/optimizing/code_generator_vector_arm_vixl.cc @@ -81,6 +81,14 @@ void InstructionCodeGeneratorARMVIXL::VisitVecNeg(HVecNeg* instruction) { LOG(FATAL) << "No SIMD for " << instruction->GetId(); } +void LocationsBuilderARMVIXL::VisitVecAbs(HVecAbs* instruction) { + CreateVecUnOpLocations(GetGraph()->GetArena(), instruction); +} + +void InstructionCodeGeneratorARMVIXL::VisitVecAbs(HVecAbs* instruction) { + LOG(FATAL) << "No SIMD for " << instruction->GetId(); +} + void LocationsBuilderARMVIXL::VisitVecNot(HVecNot* instruction) { CreateVecUnOpLocations(GetGraph()->GetArena(), instruction); } |