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author | buzbee <buzbee@google.com> | 2014-05-11 21:09:53 -0700 |
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committer | buzbee <buzbee@google.com> | 2014-05-12 05:04:46 -0700 |
commit | d111c6eeb01955964d9c7f68126adcb1e1824ab3 (patch) | |
tree | 0feb1c424f517a7750375971c3605db16212c110 /compiler/dex/quick/ralloc_util.cc | |
parent | e1910f1d802dff79bba5ef61e1c4fd0b95f6e5b0 (diff) | |
download | art-d111c6eeb01955964d9c7f68126adcb1e1824ab3.tar.gz art-d111c6eeb01955964d9c7f68126adcb1e1824ab3.tar.bz2 art-d111c6eeb01955964d9c7f68126adcb1e1824ab3.zip |
Quick compiler: RegStorage tweak
Previously, the RegStorage struct allowed for up to 32 physical
registers per register class. Although this is sufficient to
handle instruction encodings for all targets, some targets may
re-use the register number encoding for different physical elements.
For example, Arm64 uses register encoding 0x1f for both the stack
pointer and the zero register. This change adds a bit to the low
register number, allowing 0..63. Targets can use this extra
encoding space to differentiate between multiple uses of the same
encoding pattern.
Change-Id: I11f2ebbce8865a08627eef5868bb51fae6421c33
Diffstat (limited to 'compiler/dex/quick/ralloc_util.cc')
0 files changed, 0 insertions, 0 deletions