diff options
| author | Mingyao Yang <mingyao@google.com> | 2014-04-08 11:02:52 -0700 |
|---|---|---|
| committer | Mingyao Yang <mingyao@google.com> | 2014-04-16 14:15:53 -0700 |
| commit | e643a179cf5585ba6bafdd4fa51730d9f50c06f6 (patch) | |
| tree | 9560b04c62d60af3b7225260a62b1542cb67b091 /compiler/dex/quick/mips | |
| parent | 9b417e4f0f87da6bfe8dc5f02c987acfcb6dca31 (diff) | |
| download | art-e643a179cf5585ba6bafdd4fa51730d9f50c06f6.tar.gz art-e643a179cf5585ba6bafdd4fa51730d9f50c06f6.tar.bz2 art-e643a179cf5585ba6bafdd4fa51730d9f50c06f6.zip | |
Use LIRSlowPath for throwing NPE.
Get rid of launchpads for throwing NPE and use LIRSlowPath instead.
Also clean up some code of using LIRSlowPath for checking div
by zero.
Bug: 13170824
Change-Id: I0c20a49c39feff3eb1f147755e557d9bc0ff15bb
Diffstat (limited to 'compiler/dex/quick/mips')
| -rw-r--r-- | compiler/dex/quick/mips/codegen_mips.h | 2 | ||||
| -rw-r--r-- | compiler/dex/quick/mips/int_mips.cc | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/compiler/dex/quick/mips/codegen_mips.h b/compiler/dex/quick/mips/codegen_mips.h index 5089111cc3..40641d670d 100644 --- a/compiler/dex/quick/mips/codegen_mips.h +++ b/compiler/dex/quick/mips/codegen_mips.h @@ -131,7 +131,7 @@ class MipsMir2Lir FINAL : public Mir2Lir { RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div); RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div); void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2); - void GenDivZeroCheck(RegStorage reg); + void GenDivZeroCheckWide(RegStorage reg); void GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method); void GenExitSequence(); void GenSpecialExitSequence(); diff --git a/compiler/dex/quick/mips/int_mips.cc b/compiler/dex/quick/mips/int_mips.cc index 0492fdb451..ac0847f22d 100644 --- a/compiler/dex/quick/mips/int_mips.cc +++ b/compiler/dex/quick/mips/int_mips.cc @@ -342,11 +342,11 @@ void MipsMir2Lir::GenMultiplyByTwoBitMultiplier(RegLocation rl_src, } } -void MipsMir2Lir::GenDivZeroCheck(RegStorage reg) { +void MipsMir2Lir::GenDivZeroCheckWide(RegStorage reg) { DCHECK(reg.IsPair()); // TODO: support k64BitSolo. RegStorage t_reg = AllocTemp(); OpRegRegReg(kOpOr, t_reg, reg.GetLow(), reg.GetHigh()); - AddDivZeroSlowPath(kCondEq, t_reg, 0); + GenDivZeroCheck(kCondEq); FreeTemp(t_reg); } |