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author | Fred Shih <ffred@google.com> | 2014-07-16 18:38:08 -0700 |
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committer | Fred Shih <ffred@google.com> | 2014-08-25 11:16:53 -0700 |
commit | 37f05ef45e0393de812d51261dc293240c17294d (patch) | |
tree | 7c7793862efa52e1deb42babbdcb652c245ab941 /compiler/dex/quick/gen_invoke.cc | |
parent | e25826e28ea65d9c1aa23f84788a091c677b20c7 (diff) | |
download | art-37f05ef45e0393de812d51261dc293240c17294d.tar.gz art-37f05ef45e0393de812d51261dc293240c17294d.tar.bz2 art-37f05ef45e0393de812d51261dc293240c17294d.zip |
Reduced memory usage of primitive fields smaller than 4-bytes
Reduced memory used by byte and boolean fields from 4 bytes down to a
single byte and shorts and chars down to two bytes. Fields are now
arranged as Reference followed by decreasing component sizes, with
fields shuffled forward as needed.
Bug: 8135266
Change-Id: I65eaf31ed27e5bd5ba0c7d4606454b720b074752
Diffstat (limited to 'compiler/dex/quick/gen_invoke.cc')
-rwxr-xr-x | compiler/dex/quick/gen_invoke.cc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/compiler/dex/quick/gen_invoke.cc b/compiler/dex/quick/gen_invoke.cc index 3cfc9a6c93..3fdbe2040f 100755 --- a/compiler/dex/quick/gen_invoke.cc +++ b/compiler/dex/quick/gen_invoke.cc @@ -1158,12 +1158,12 @@ bool Mir2Lir::GenInlinedReferenceGet(CallInfo* info) { // intrinsic logic start. RegLocation rl_obj = info->args[0]; - rl_obj = LoadValue(rl_obj); + rl_obj = LoadValue(rl_obj, kRefReg); RegStorage reg_slow_path = AllocTemp(); RegStorage reg_disabled = AllocTemp(); - Load32Disp(reg_class, slow_path_flag_offset, reg_slow_path); - Load32Disp(reg_class, disable_flag_offset, reg_disabled); + Load8Disp(reg_class, slow_path_flag_offset, reg_slow_path); + Load8Disp(reg_class, disable_flag_offset, reg_disabled); FreeTemp(reg_class); LIR* or_inst = OpRegRegReg(kOpOr, reg_slow_path, reg_slow_path, reg_disabled); FreeTemp(reg_disabled); @@ -1297,10 +1297,10 @@ bool Mir2Lir::GenInlinedReverseBytes(CallInfo* info, OpSize size) { return false; } RegLocation rl_src_i = info->args[0]; - RegLocation rl_i = (size == k64) ? LoadValueWide(rl_src_i, kCoreReg) : LoadValue(rl_src_i, kCoreReg); - RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info); // result reg + RegLocation rl_i = IsWide(size) ? LoadValueWide(rl_src_i, kCoreReg) : LoadValue(rl_src_i, kCoreReg); + RegLocation rl_dest = IsWide(size) ? InlineTargetWide(info) : InlineTarget(info); // result reg RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); - if (size == k64) { + if (IsWide(size)) { if (cu_->instruction_set == kArm64 || cu_->instruction_set == kX86_64) { OpRegReg(kOpRev, rl_result.reg, rl_i.reg); StoreValueWide(rl_dest, rl_result); |