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path: root/drivers/gpu/drm/i915/intel_drv.h
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* drm/i915: Nuke fbc members from intel_crtc->atomic, v4.Maarten Lankhorst2016-03-161-15/+0
* drm/i915: Remove some post-commit members from intel_crtc->atomic, v3.Maarten Lankhorst2016-03-161-4/+1
* drm/i915: Fix watermarks for VLV/CHVVille Syrjälä2016-03-101-1/+1
* drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interfaceAnder Conselvan de Oliveira2016-03-091-1/+0
* drm/i915: Move shared dpll function prototypes to intel_dpll_mgr.hAnder Conselvan de Oliveira2016-03-091-28/+0
* drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira2016-03-091-3/+16
* drm/i915: Move ddi shared dpll code to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-1/+0
* drm/i915: Move shared dpll code to a new fileAnder Conselvan de Oliveira2016-03-091-0/+8
* drm/i915: Only use sanitized values for ILK watermarksMaarten Lankhorst2016-03-091-0/+1
* drm/i915/gen9: Fix DMC firmware initializationImre Deak2016-03-071-1/+1
* drm/i915: Store rawclk_freq in dev_privVille Syrjälä2016-03-041-2/+0
* drm/i915: Do not lie about atomic timeout granularityTvrtko Ursulin2016-03-031-2/+35
* drm/i915: Add wait_for_usTvrtko Ursulin2016-03-031-7/+8
* drm/i915: Only recalculate wm's for planes part of the state, v2.Maarten Lankhorst2016-03-031-0/+12
* drm/i915: Read out VGA dotclock properly on LPTVille Syrjälä2016-03-011-0/+1
* drm/i915: Move the encoder vs. FDI dotclock check out from encoder .get_config()Ville Syrjälä2016-03-011-3/+0
* drm/i915: Embed rotation_info under intel_framebufferVille Syrjälä2016-03-011-0/+1
* drm/i915: Reorganize intel_rotation_infoVille Syrjälä2016-03-011-0/+1
* drm/i915: Pass drm_frambuffer to intel_compute_page_offset()Ville Syrjälä2016-03-011-4/+2
* drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj()Ville Syrjälä2016-03-011-3/+2
* drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_off...Ville Syrjälä2016-03-011-1/+2
* drm/i915: Add two-stage ILK-style watermark programming (v11)Matt Roper2016-02-291-2/+26
* drm/i915: Remove update_sprite_watermarks.Maarten Lankhorst2016-02-251-1/+0
* drm/i915: Kill off intel_crtc->atomic.wait_vblank, v6.Maarten Lankhorst2016-02-251-1/+1
* drm/i915: Make sure pipe interrupts are processed before turning off power we...Ville Syrjälä2016-02-221-0/+2
* drm/i915/gen9: Write dc state debugmask bits only onceMika Kuoppala2016-02-221-1/+1
* drm/i915: Use atomic state to obtain load detection crtc, v3.Maarten Lankhorst2016-02-181-3/+1
* drm/i915: Add helper to get a display power ref if it was already enabledImre Deak2016-02-171-0/+3
* drm/i915: edp resume/On time optimization.Abhay Kumar2016-02-121-1/+1
* Merge tag 'topic/drm-misc-2016-02-12' into drm-intel-next-queuedDaniel Vetter2016-02-121-1/+0
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| * Merge tag 'topic/drm-misc-2016-02-08' of git://anongit.freedesktop.org/drm-in...Dave Airlie2016-02-091-1/+0
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| | * drm/i915: Nuke intel_modeset_precloseDaniel Vetter2016-02-081-1/+0
| | * drm/i915: Tune down rpm wakelock debug checksDaniel Vetter2016-01-131-2/+4
* | | drm/i915: Remove atomic.pre_disable_primary.Maarten Lankhorst2016-02-081-1/+0
* | | drm/i915: Remove intel_crtc->atomic.disable_ips.Maarten Lankhorst2016-02-081-1/+0
* | | drm/i915/bxt: Check BIOS RC6 setup before enabling RC6Sagar Arun Kamble2016-02-051-0/+1
* | | drm/i915/fbc: choose the new FBC CRTC during atomic checkPaulo Zanoni2016-01-291-0/+4
* | | drm/i915/fbc: rewrite the multiple_pipes_ok() code for lockingPaulo Zanoni2016-01-291-0/+1
* | | drm/i915/fbc: rename the FBC disable functionsPaulo Zanoni2016-01-291-2/+2
* | | drm/i915/fbc: unexport intel_fbc_deactivatePaulo Zanoni2016-01-291-1/+0
* | | drm/i915/fbc: fix the FBC state checking codePaulo Zanoni2016-01-291-3/+5
* | | drm/i915: Make display gtt offsets u32Ville Syrjälä2016-01-281-6/+6
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* | drm/i915: Do not put big intel_crtc_state on the stackTvrtko Ursulin2016-01-201-2/+2
* | Revert "drm/i915: Add two-stage ILK-style watermark programming (v10)"Matt Roper2016-01-201-26/+2
* | drm/i915: s/intel_gen4_compute_page_offset/intel_compute_tile_offset/Ville Syrjälä2016-01-131-5/+5
* | drm/i915: Redo intel_tile_height() as intel_tile_size() / intel_tile_width()Ville Syrjälä2016-01-131-3/+2
* | drm/i915: Factor out intel_tile_width()Ville Syrjälä2016-01-131-2/+2
* | drm/i915: Pass modifier instead of tiling_mode to gen4_compute_page_offset()Ville Syrjälä2016-01-131-2/+2
* | drm/i915: Kill intel_prepare_ddi()Ville Syrjälä2016-01-121-1/+1
* | drm/i915: Store max lane count in intel_digital_portVille Syrjälä2016-01-121-0/+1
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