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path: root/drivers/clk/imx/clk.h
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* clk: imx8m: fix clock tree update of TF-A managed clocksAhmad Fatoum2021-09-181-2/+14
* clk: imx: Fix reparenting of UARTs not associated with stdoutAdam Ford2021-05-141-2/+2
* clk: imx8m: fix bus critical clk registrationPeng Fan2020-11-041-0/+5
* clk: imx: Explicitly include bits.hAnson Huang2020-08-221-0/+1
* clk: imx: Support building i.MX common clock driver as moduleAnson Huang2020-08-221-0/+6
* clk: imx: add imx8m_clk_hw_composite_busPeng Fan2020-05-211-0/+7
* clk: imx: Add helpers for passing the device as argumentAbel Vesa2020-04-291-0/+29
* clk: imx: pll14xx: Add the device as argument when registeringAbel Vesa2020-04-291-3/+10
* clk: imx: gate2: Allow single bit gating clockAbel Vesa2020-04-291-0/+13
* clk: imx: composite-8m: add imx8m_clk_hw_composite_corePeng Fan2020-02-141-2/+11
* clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based APIAnson Huang2020-01-121-2/+5
* clk: imx: gate3: Switch to clk_hw based APIPeng Fan2019-12-231-2/+5
* clk: imx: add hw API imx_clk_hw_mux2_flagsPeng Fan2019-12-231-0/+10
* clk: imx: add imx_unregister_hw_clocksPeng Fan2019-12-231-0/+1
* clk: imx: clk-composite-8m: Switch to clk_hw based APIPeng Fan2019-12-231-7/+22
* clk: imx: clk-pll14xx: Switch to clk_hw based APIPeng Fan2019-12-231-0/+7
* clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: Rename sccg and frac pll register to suggest clk_hwAbel Vesa2019-12-111-2/+10
* clk: imx: imx7ulp composite: Rename to show is clk_hw basedAbel Vesa2019-12-111-1/+1
* clk: imx: pllv2: Switch to clk_hw based APIAbel Vesa2019-12-111-1/+4
* clk: imx: pllv1: Switch to clk_hw based APIAbel Vesa2019-12-111-1/+4
* clk: imx: Replace all the clk based helpers with macrosAbel Vesa2019-12-111-27/+12
* clk: imx: Rename the SCCG to SSCGAbel Vesa2019-12-111-2/+2
* clk: imx: Add correct failure handling for clk based helpersAbel Vesa2019-12-111-15/+22
* clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHELeonard Crestez2019-12-091-0/+1
* clk: imx8mm: Move 1443X/1416X PLL clock structure to common placeAnson Huang2019-10-061-0/+3
* clk: imx: Remove unused function statementAnson Huang2019-08-031-1/+0
* clk: imx: Remove unused clk based APIAbel Vesa2019-08-031-24/+0
* clk: imx: Add API for clk unregister when driver probe failAnson Huang2019-08-031-0/+1
* clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usageAnson Huang2019-08-031-0/+17
* clk: imx: Switch wrappers to clk_hw based APIAbel Vesa2019-06-071-26/+65
* clk: imx: clk-fixup-mux: Switch to clk_hw based APIAbel Vesa2019-06-071-0/+3
* clk: imx: clk-fixup-div: Switch to clk_hw based APIAbel Vesa2019-06-071-2/+5
* clk: imx: clk-gate-exclusive: Switch to clk_hw based APIAbel Vesa2019-06-071-1/+4
* clk: imx: clk-pfd: Switch to clk_hw based APIAbel Vesa2019-06-071-1/+4
* clk: imx: clk-pllv3: Switch to clk_hw based APIAbel Vesa2019-06-071-1/+4
* clk: imx: clk-gate2: Switch to clk_hw based APIAbel Vesa2019-06-071-1/+6
* clk: imx: clk-cpu: Switch to clk_hw based APIAbel Vesa2019-06-071-1/+4
* clk: imx: clk-busy: Switch to clk_hw based APIAbel Vesa2019-06-071-2/+9
* clk: imx: Add imx_obtain_fixed_clock clk_hw based variantAbel Vesa2019-06-071-0/+3
* clk: imx: Add common API for masking MMDC handshakeAnson Huang2019-05-231-0/+1
* clk: imx: correct i.MX7D AV PLL num/denom offsetAnson Huang2019-04-291-0/+1
* clk: imx: Remove unused imx_get_clk_hw_fixedAbel Vesa2019-03-261-5/+0
* clk: imx: Refactor entire sccg pll clkAbel Vesa2019-02-261-3/+6
* clk: imx: Add PLLs driver for imx8mm socBai Ping2019-02-211-0/+24
* clk: imx: Make parents const pointer in mux wrappersAbel Vesa2019-02-211-1/+2
* clk: imx: Make parent_names const pointer in composite-8mAbel Vesa2019-02-211-1/+1
*-. Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp...Stephen Boyd2018-12-141-7/+153
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