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authorRafael J. Wysocki <rjw@sisk.pl>2011-09-26 20:12:45 +0200
committerRafael J. Wysocki <rjw@sisk.pl>2011-09-26 20:12:45 +0200
commit0d41da2e31e81f5c8aaabe17f769de4304b2d4c8 (patch)
tree540acefba9bf01d3880d7bacb767fbf9b1fe80b4 /drivers/net/sfc/efx.c
parenta0089bd617adea27ebc352e1e0871649ab1dbaa6 (diff)
parente8b364b88cc4001b21c28c1ecf1e1e3ffbe162e6 (diff)
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Merge branch 'pm-fixes' into pm-domains
Merge commit e8b364b88cc4001b21c28c1ecf1e1e3ffbe162e6 (PM / Clocks: Do not acquire a mutex under a spinlock) fixing a regression in drivers/base/power/clock_ops.c. Conflicts: drivers/base/power/clock_ops.c
Diffstat (limited to 'drivers/net/sfc/efx.c')
-rw-r--r--drivers/net/sfc/efx.c18
1 files changed, 2 insertions, 16 deletions
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index faca764aa21b..b59abc706d93 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -1050,7 +1050,6 @@ static int efx_init_io(struct efx_nic *efx)
{
struct pci_dev *pci_dev = efx->pci_dev;
dma_addr_t dma_mask = efx->type->max_dma_mask;
- bool use_wc;
int rc;
netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
@@ -1101,21 +1100,8 @@ static int efx_init_io(struct efx_nic *efx)
rc = -EIO;
goto fail3;
}
-
- /* bug22643: If SR-IOV is enabled then tx push over a write combined
- * mapping is unsafe. We need to disable write combining in this case.
- * MSI is unsupported when SR-IOV is enabled, and the firmware will
- * have removed the MSI capability. So write combining is safe if
- * there is an MSI capability.
- */
- use_wc = (!EFX_WORKAROUND_22643(efx) ||
- pci_find_capability(pci_dev, PCI_CAP_ID_MSI));
- if (use_wc)
- efx->membase = ioremap_wc(efx->membase_phys,
- efx->type->mem_map_size);
- else
- efx->membase = ioremap_nocache(efx->membase_phys,
- efx->type->mem_map_size);
+ efx->membase = ioremap_nocache(efx->membase_phys,
+ efx->type->mem_map_size);
if (!efx->membase) {
netif_err(efx, probe, efx->net_dev,
"could not map memory BAR at %llx+%x\n",