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authorLinus Torvalds <torvalds@linux-foundation.org>2016-12-17 16:41:10 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2016-12-17 16:41:10 -0800
commitc07dee7348e2451bcf2f178bf0e7830268e2c31a (patch)
treed0d4b82872cc1519c57e770af55e3e0c770d5b68 /drivers/mtd/nand/nand_timings.c
parent135c919758b019599c9ea7730f7ceb063f19c7b7 (diff)
parent445caaa20c4d6da74f426464f90513b81157ad77 (diff)
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Merge tag 'for-linus-20161216' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris: "Nothing enormous here, though notably we have some of the first work of a few new maintainers. I think for now I'll still be sending pull requests, but that's open to change in the future. Summary: Core: - dynamic BDI object allocation (resolves some problems when built as a module) - cleanups in the ooblayout handling NAND: - new tango NAND controller driver - new ox820 NAND controller driver - addition of a new full-ID entry in the nand_ids table - rework of the s3c240 driver to support DT - extension of the nand_sdr_timings to expose tCCS, tPROG and tR - addition of a new flag to ask the core to wait for tCCS when sending a RNDIN/RNDOUT command - addition of a new flag to ask the core to let the controller driver send the READ/PROGPAGE command Minor fixes/cleanup/cosmetic changes: - properly support 512 ECC step size in the sunxi driver - improve the error messages in the PXA probe path - fix module autoload in the omap2 driver - cleanup of several nand drivers to return nand_scan{_tail}() error code instead of returning -EIO - various cleanups in the denali driver - fix an error check in nandsim SPI NOR: - new flash IDs - wait for Spansion flash to be ready after quad-enable - error handling fixes for Candence QSPI - constify some structures in Freescale QSPI driver" * tag 'for-linus-20161216' of git://git.infradead.org/linux-mtd: (71 commits) mtd: Allocate bdi objects dynamically mtd: nand: tango: Add standard legalese header mtd: maps: add missing iounmap() in error path mtd: spi-nor: constify fsl_qspi_devtype_data mtd: spi-nor: Add support for mr25h40 mtd: spi-nor: Add support for N25Q016A mtd: spi-nor: Add at25df321 spi-nor flash support mtd: spi-nor: Fix some error codes in cqspi_setup_flash() mtd: spi-nor: Off by one in cqspi_setup_flash() mtd: spi-nor: add support for s25fl208k mtd: spi-nor: fix flags for s25fl128s mtd: spi-nor: fix spansion quad enable mtd: spi-nor: add Macronix mx25u25635f to list of known devices. mtd: mtdswap: fix spelling mistake "erassure" -> "erasure" mtd: bcm47xxpart: fix parsing first block after aligned TRX mtd: nand: tango: Use nand_to_mtd() instead of directly accessing chip->mtd mtd: remove unneeded initializer in mtd_ooblayout_count_bytes() mtd: use min_t() to refactor mtd_ooblayout_{get, set}_bytes() mtd: remove unneeded initializer in mtd_ooblayout_{get, set}_bytes() mtd: nand: nandsim: fix error check ...
Diffstat (limited to 'drivers/mtd/nand/nand_timings.c')
-rw-r--r--drivers/mtd/nand/nand_timings.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/nand_timings.c
index 13a587407be3..f06312df3669 100644
--- a/drivers/mtd/nand/nand_timings.c
+++ b/drivers/mtd/nand/nand_timings.c
@@ -18,6 +18,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
{
.type = NAND_SDR_IFACE,
.timings.sdr = {
+ .tCCS_min = 500000,
+ .tR_max = 200000000,
.tADL_min = 400000,
.tALH_min = 20000,
.tALS_min = 50000,
@@ -58,6 +60,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
{
.type = NAND_SDR_IFACE,
.timings.sdr = {
+ .tCCS_min = 500000,
+ .tR_max = 200000000,
.tADL_min = 400000,
.tALH_min = 10000,
.tALS_min = 25000,
@@ -98,6 +102,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
{
.type = NAND_SDR_IFACE,
.timings.sdr = {
+ .tCCS_min = 500000,
+ .tR_max = 200000000,
.tADL_min = 400000,
.tALH_min = 10000,
.tALS_min = 15000,
@@ -138,6 +144,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
{
.type = NAND_SDR_IFACE,
.timings.sdr = {
+ .tCCS_min = 500000,
+ .tR_max = 200000000,
.tADL_min = 400000,
.tALH_min = 5000,
.tALS_min = 10000,
@@ -178,6 +186,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
{
.type = NAND_SDR_IFACE,
.timings.sdr = {
+ .tCCS_min = 500000,
+ .tR_max = 200000000,
.tADL_min = 400000,
.tALH_min = 5000,
.tALS_min = 10000,
@@ -218,6 +228,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
{
.type = NAND_SDR_IFACE,
.timings.sdr = {
+ .tCCS_min = 500000,
+ .tR_max = 200000000,
.tADL_min = 400000,
.tALH_min = 5000,
.tALS_min = 10000,
@@ -290,10 +302,22 @@ int onfi_init_data_interface(struct nand_chip *chip,
*iface = onfi_sdr_timings[timing_mode];
/*
- * TODO: initialize timings that cannot be deduced from timing mode:
+ * Initialize timings that cannot be deduced from timing mode:
* tR, tPROG, tCCS, ...
* These information are part of the ONFI parameter page.
*/
+ if (chip->onfi_version) {
+ struct nand_onfi_params *params = &chip->onfi_params;
+ struct nand_sdr_timings *timings = &iface->timings.sdr;
+
+ /* microseconds -> picoseconds */
+ timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog);
+ timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers);
+ timings->tR_max = 1000000UL * le16_to_cpu(params->t_r);
+
+ /* nanoseconds -> picoseconds */
+ timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);
+ }
return 0;
}