Merge tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Decrease polling rate for erase/trim/discard
   - Allow non-sleeping GPIOs for card detect
   - Improve mmc block removal path
   - Enable support for mmc_sw_reset() for SDIO cards
   - Add mmc_sw_reset() to allow users to do a soft reset of the card
   - Allow power delay to be tunable via DT
   - Allow card detect debounce delay to be tunable via DT
   - Enable new quirk to limit clock rate for Marvell 8887 chip
   - Don't show eMMC RPMB and BOOT areas in /proc/partitions
   - Add capability to avoid 3.3V signaling for fragile HWs

  MMC host:
   - Improve/fixup support for handle highmem pages
   - Remove depends on HAS_DMA in case of platform dependency
   - mvsdio: Enable support for erase/trim/discard
   - rtsx_usb: Enable support for erase/trim/discard
   - renesas_sdhi: Fix WP logic regressions
   - renesas_sdhi: Add r8a77965 support
   - renesas_sdhi: Add R8A77980 to whitelist
   - meson: Add optional support for device reset
   - meson: Add support for the Meson-AXG platform
   - dw_mmc: Add new driver for BlueField DW variant
   - mediatek: Add support for 64G DRAM DMA
   - sunxi: Deploy runtime PM support
   - jz4740: Add support for JZ4780
   - jz4740: Enable support for DT based platforms
   - sdhci: Various improvement to timeout handling
   - sdhci: Disable support for HS200/HS400/UHS when no 1.8V support
   - sdhci-omap: Add support for controller in k2g SoC
   - sdhci-omap: Add workarounds for a couple of Erratas
   - sdhci-omap: Enable support for generic sdhci DT properties
   - sdhci-cadence: Re-send tune request to deal with errata
   - sdhci-pci: Fix 3.3V voltage switch for some BYT-based Intel controllers
   - sdhci-pci: Avoid 3.3V signaling on some NI 904x
   - sdhci-esdhc-imx: Use watermark levels for PIO access
   - sdhci-msm: Improve card detection handling
   - sdhci-msm: Add support voltage pad switching"

* tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (104 commits)
  mmc: renesas_sdhi: really fix WP logic regressions
  mmc: mvsdio: Enable MMC_CAP_ERASE
  mmc: mvsdio: Respect card busy time out from mmc core
  mmc: sdhci-msm: Remove NO_CARD_NO_RESET quirk
  mmc: sunxi: Use ifdef rather than __maybe_unused
  mmc: mxmmc: Use ifdef rather than __maybe_unused
  mmc: mxmmc: include linux/highmem.h
  mmc: sunxi: mark PM functions as __maybe_unused
  mmc: Throttle calls to MMC_SEND_STATUS during mmc_do_erase()
  mmc: au1xmmc: handle highmem pages
  mmc: Allow non-sleeping GPIO cd
  mmc: sdhci-*: Don't emit error msg if sdhci_add_host() fails
  mmc: sd: Define name for default speed dtr
  mmc: core: Move calls to ->prepare_hs400_tuning() closer to mmc code
  mmc: sdhci-xenon: use match_string() helper
  mmc: wbsd: handle highmem pages
  mmc: ushc: handle highmem pages
  mmc: mxcmmc: handle highmem pages
  mmc: atmel-mci: use sg_copy_{from,to}_buffer
  mmc: android-goldfish: use sg_copy_{from,to}_buffer
  ...

1 files changed, 15 insertions, 0 deletions

diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index c95b0a4a7594..23966f887da6 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -332,6 +332,14 @@ struct sdhci_adma2_64_desc {
 /* Allow for a a command request and a data request at the same time */
 #define SDHCI_MAX_MRQS		2
 
+/*
+ * 48bit command and 136 bit response in 100KHz clock could take upto 2.48ms.
+ * However since the start time of the command, the time between
+ * command and response, and the time between response and start of data is
+ * not known, set the command transfer time to 10ms.
+ */
+#define MMC_CMD_TRANSFER_TIME	(10 * NSEC_PER_MSEC) /* max 10 ms */
+
 enum sdhci_cookie {
 	COOKIE_UNMAPPED,
 	COOKIE_PRE_MAPPED,	/* mapped by sdhci_pre_req() */
@@ -437,6 +445,11 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN		(1<<15)
 /* Controller has CRC in 136 bit Command Response */
 #define SDHCI_QUIRK2_RSP_136_HAS_CRC			(1<<16)
+/*
+ * Disable HW timeout if the requested timeout is more than the maximum
+ * obtainable timeout.
+ */
+#define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT			(1<<17)
 
 	int irq;		/* Device IRQ */
 	void __iomem *ioaddr;	/* Mapped address */
@@ -550,6 +563,8 @@ struct sdhci_host {
 	/* Host SDMA buffer boundary. */
 	u32			sdma_boundary;
 
+	u64			data_timeout;
+
 	unsigned long private[0] ____cacheline_aligned;
 };