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| author | Thomas Gleixner <tglx@linutronix.de> | 2018-12-18 18:37:27 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-12-18 18:37:27 +0100 |
| commit | ff3730a497cd636e53d4cac5cbb9652b76de9ef5 (patch) | |
| tree | a25b8f0759cfdb044474a2d88707fe5e3ac491c0 /drivers/irqchip/irq-bcm2835.c | |
| parent | c5f48c0a7aa1a8c82d81cdf27e63aa0a5544c6e6 (diff) | |
| parent | fb94109b764e7676fa63834b9033ba97175877a0 (diff) | |
| download | kernel_replicant_linux-ff3730a497cd636e53d4cac5cbb9652b76de9ef5.tar.gz kernel_replicant_linux-ff3730a497cd636e53d4cac5cbb9652b76de9ef5.tar.bz2 kernel_replicant_linux-ff3730a497cd636e53d4cac5cbb9652b76de9ef5.zip | |
Merge tag 'irqchip-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- A bunch of new irqchip drivers (RDA8810PL, Madera, imx-irqsteer)
- Updates for new (and old) platforms (i.MX8MQ, F1C100s)
- A number of SPDX cleanups
- A workaround for a very broken GICv3 implementation
- A platform-msi fix
- Various cleanups
Diffstat (limited to 'drivers/irqchip/irq-bcm2835.c')
| -rw-r--r-- | drivers/irqchip/irq-bcm2835.c | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c index d2da8a1e6b1b..418245d31921 100644 --- a/drivers/irqchip/irq-bcm2835.c +++ b/drivers/irqchip/irq-bcm2835.c @@ -1,17 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2010 Broadcom * Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits * * If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8 |