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| author | Dave Airlie <airlied@redhat.com> | 2018-12-06 08:09:33 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2018-12-06 09:17:51 +1000 |
| commit | 467e8a516dcf922d1ea343cebb0e751f81f0dca3 (patch) | |
| tree | c22b6d971e922223286a4a181d6701c7d32e523d /drivers/gpu/drm/i915/intel_workarounds.h | |
| parent | 818182dd1097fdc492aaef9b08755ea13274352d (diff) | |
| parent | 4377d4e0d3d511986033ba7b4182d5a80b7f9ea2 (diff) | |
| download | kernel_replicant_linux-467e8a516dcf922d1ea343cebb0e751f81f0dca3.tar.gz kernel_replicant_linux-467e8a516dcf922d1ea343cebb0e751f81f0dca3.tar.bz2 kernel_replicant_linux-467e8a516dcf922d1ea343cebb0e751f81f0dca3.zip | |
Merge tag 'drm-intel-next-2018-12-04' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Final drm/i915 changes for v4.21:
- ICL DSI video mode enabling (Madhav, Vandita, Jani, Imre)
- eDP sink count fix (José)
- PSR fixes (José)
- DRM DP helper and i915 DSC enabling (Manasi, Gaurav, Anusha)
- DP FEC enabling (Anusha)
- SKL+ watermark/ddb programming improvements (Ville)
- Pixel format fixes (Ville)
- Selftest updates (Chris, Tvrtko)
- GT and engine workaround improvements (Tvrtko)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87va496uoe.fsf@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_workarounds.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_workarounds.h | 36 |
1 files changed, 32 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_workarounds.h b/drivers/gpu/drm/i915/intel_workarounds.h index b11d0623e626..7c734714b05e 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.h +++ b/drivers/gpu/drm/i915/intel_workarounds.h @@ -7,11 +7,39 @@ #ifndef _I915_WORKAROUNDS_H_ #define _I915_WORKAROUNDS_H_ -int intel_ctx_workarounds_init(struct drm_i915_private *dev_priv); -int intel_ctx_workarounds_emit(struct i915_request *rq); +#include <linux/slab.h> -void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv); +struct i915_wa { + i915_reg_t reg; + u32 mask; + u32 val; +}; -void intel_whitelist_workarounds_apply(struct intel_engine_cs *engine); +struct i915_wa_list { + const char *name; + struct i915_wa *list; + unsigned int count; + unsigned int wa_count; +}; + +static inline void intel_wa_list_free(struct i915_wa_list *wal) +{ + kfree(wal->list); + memset(wal, 0, sizeof(*wal)); +} + +void intel_engine_init_ctx_wa(struct intel_engine_cs *engine); +int intel_engine_emit_ctx_wa(struct i915_request *rq); + +void intel_gt_init_workarounds(struct drm_i915_private *dev_priv); +void intel_gt_apply_workarounds(struct drm_i915_private *dev_priv); +bool intel_gt_verify_workarounds(struct drm_i915_private *dev_priv, + const char *from); + +void intel_engine_init_whitelist(struct intel_engine_cs *engine); +void intel_engine_apply_whitelist(struct intel_engine_cs *engine); + +void intel_engine_init_workarounds(struct intel_engine_cs *engine); +void intel_engine_apply_workarounds(struct intel_engine_cs *engine); #endif |