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| author | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2018-10-04 11:46:03 +0200 |
|---|---|---|
| committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2018-10-05 15:19:08 +0200 |
| commit | 958bb4528d16d0f6cdab7a34a9bd141b42768ca2 (patch) | |
| tree | bc3cd668aaf850e3479efdf3a0c9fa9af67f2df7 /drivers/gpu/drm/i915/intel_dpio_phy.c | |
| parent | f56f6648404b411b377a3082bc9459fed66a968f (diff) | |
| download | kernel_replicant_linux-958bb4528d16d0f6cdab7a34a9bd141b42768ca2.tar.gz kernel_replicant_linux-958bb4528d16d0f6cdab7a34a9bd141b42768ca2.tar.bz2 kernel_replicant_linux-958bb4528d16d0f6cdab7a34a9bd141b42768ca2.zip | |
drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
Fixing chv_set_phy_signal_level() still requires too many levels of
indirection to pass crtc_state along, but chv_data_lane_soft_reset()
already has a crtc_state we can use.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004094604.2646-13-maarten.lankhorst@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpio_phy.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dpio_phy.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c index 00b3ab656b06..3c7f10d17658 100644 --- a/drivers/gpu/drm/i915/intel_dpio_phy.c +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c @@ -748,7 +748,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder, val |= DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET; vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val); - if (crtc->config->lane_count > 2) { + if (crtc_state->lane_count > 2) { val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch)); if (reset) val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET); @@ -765,7 +765,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder, val |= DPIO_PCS_CLK_SOFT_RESET; vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val); - if (crtc->config->lane_count > 2) { + if (crtc_state->lane_count > 2) { val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch)); val |= CHV_PCS_REQ_SOFTRESET_EN; if (reset) |