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| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2019-06-06 15:42:24 -0700 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-06-09 11:21:33 +0100 |
| commit | 33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1 (patch) | |
| tree | 45bee7402d3af6ab7406d1acdbecaa3377229038 /drivers/gpu/drm/i915/i915_pci.c | |
| parent | 6be306bee7dd80905329769292e21b5e2d166b8f (diff) | |
| download | kernel_replicant_linux-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.tar.gz kernel_replicant_linux-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.tar.bz2 kernel_replicant_linux-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.zip | |
drm/i915/guc: always use Command Transport Buffers
Now that we've moved the Gen9 GuC blobs to version 32 we have CTB
support on all gens, so no need to restrict the usage to Gen11+.
Note that MMIO communication is still required for CTB initialization.
v2: fix commit message nits (Michal)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190606224225.14287-1-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index e761ea86b481..482f1d0f1770 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -746,7 +746,6 @@ static const struct intel_device_info intel_cannonlake_info = { }, \ GEN(11), \ .ddb_size = 2048, \ - .has_guc_ct = 1, \ .has_logical_ring_elsq = 1, \ .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 } |