diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2020-02-20 15:18:43 -0800 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2020-02-26 15:07:42 -0800 |
| commit | 3a1b82a19ff91cfef9b5d9d9faabb0ebcac15df0 (patch) | |
| tree | 94c5295c96144100a882c020e61e72bff4e471a0 /drivers/gpu/drm/i915/display/intel_fbdev.c | |
| parent | cfdd30b4100bdcec2b3d2c013b0f33715bb76e59 (diff) | |
| download | kernel_replicant_linux-3a1b82a19ff91cfef9b5d9d9faabb0ebcac15df0.tar.gz kernel_replicant_linux-3a1b82a19ff91cfef9b5d9d9faabb0ebcac15df0.tar.bz2 kernel_replicant_linux-3a1b82a19ff91cfef9b5d9d9faabb0ebcac15df0.zip | |
drm/i915/tgl: Allow DC5/DC6 entry while PG2 is active
On gen12, we no longer need to disable DC5/DC6 when when PG2 is in use
(which translates to cases where we're using VDSC on pipe A).
Bspec: 49193
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200220231843.3127468-1-matthew.d.roper@intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_fbdev.c')
0 files changed, 0 insertions, 0 deletions