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| author | Paul Burton <paul.burton@mips.com> | 2019-10-01 21:53:31 +0000 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-10-07 09:42:49 -0700 |
| commit | a2e66b862cc7b8db1a0eb63b71e61943d48c3c8a (patch) | |
| tree | 8ff44c2c764642531e335e29cd00a4261204ae48 /arch/mips/include/asm/sync.h | |
| parent | 6bbe043bd3f4766b089b7b51a80e75745868c038 (diff) | |
| download | kernel_replicant_linux-a2e66b862cc7b8db1a0eb63b71e61943d48c3c8a.tar.gz kernel_replicant_linux-a2e66b862cc7b8db1a0eb63b71e61943d48c3c8a.tar.bz2 kernel_replicant_linux-a2e66b862cc7b8db1a0eb63b71e61943d48c3c8a.zip | |
MIPS: bitops: Allow immediates in test_and_{set,clear,change}_bit
The logical operations or & xor used in the test_and_set_bit_lock(),
test_and_clear_bit() & test_and_change_bit() functions currently force
the value 1<<bit to be placed in a register. If the bit is compile-time
constant & fits within the immediate field of an or/xor instruction (ie.
16 bits) then we can make use of the ori/xori instruction variants &
avoid the use of an extra register. Add the extra "i" constraints in
order to allow use of these immediate encodings.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/sync.h')
0 files changed, 0 insertions, 0 deletions