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| author | Colin Ian King <colin.king@canonical.com> | 2021-04-09 10:01:03 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-05-14 09:50:26 +0200 |
| commit | d3d3735858e0cb25e50109288a95083a593d1e89 (patch) | |
| tree | a71388a77e638dcd009351c0427739494b31c996 | |
| parent | c360228ecfb110f78291d94f403f94a276fca42a (diff) | |
| download | kernel_replicant_linux-d3d3735858e0cb25e50109288a95083a593d1e89.tar.gz kernel_replicant_linux-d3d3735858e0cb25e50109288a95083a593d1e89.tar.bz2 kernel_replicant_linux-d3d3735858e0cb25e50109288a95083a593d1e89.zip | |
clk: uniphier: Fix potential infinite loop
[ Upstream commit f6b1340dc751a6caa2a0567b667d0f4f4172cd58 ]
The for-loop iterates with a u8 loop counter i and compares this
with the loop upper limit of num_parents that is an int type.
There is a potential infinite loop if num_parents is larger than
the u8 loop counter. Fix this by making the loop counter the same
type as num_parents. Also make num_parents an unsigned int to
match the return type of the call to clk_hw_get_num_parents.
Addresses-Coverity: ("Infinite loop")
Fixes: 734d82f4a678 ("clk: uniphier: add core support code for UniPhier clock driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
Link: https://lore.kernel.org/r/20210409090104.629722-1-colin.king@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/clk/uniphier/clk-uniphier-mux.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-mux.c b/drivers/clk/uniphier/clk-uniphier-mux.c index 462c84321b2d..1998e9d4cfc0 100644 --- a/drivers/clk/uniphier/clk-uniphier-mux.c +++ b/drivers/clk/uniphier/clk-uniphier-mux.c @@ -31,10 +31,10 @@ static int uniphier_clk_mux_set_parent(struct clk_hw *hw, u8 index) static u8 uniphier_clk_mux_get_parent(struct clk_hw *hw) { struct uniphier_clk_mux *mux = to_uniphier_clk_mux(hw); - int num_parents = clk_hw_get_num_parents(hw); + unsigned int num_parents = clk_hw_get_num_parents(hw); int ret; unsigned int val; - u8 i; + unsigned int i; ret = regmap_read(mux->regmap, mux->reg, &val); if (ret) |