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| author | Lu Baolu <baolu.lu@linux.intel.com> | 2021-03-20 10:41:56 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-05-14 09:50:32 +0200 |
| commit | c96f7eb59b7e9f0ba7aace13169fe67e39e3adfa (patch) | |
| tree | 38d2ad9a531b2b755fc30735c04fef1d5eb3b73d | |
| parent | e0c7b956162b09a2c46623a99ef4f9b3332f4725 (diff) | |
| download | kernel_replicant_linux-c96f7eb59b7e9f0ba7aace13169fe67e39e3adfa.tar.gz kernel_replicant_linux-c96f7eb59b7e9f0ba7aace13169fe67e39e3adfa.tar.bz2 kernel_replicant_linux-c96f7eb59b7e9f0ba7aace13169fe67e39e3adfa.zip | |
iommu/vt-d: Don't set then clear private data in prq_event_thread()
[ Upstream commit 1d421058c815d54113d9afdf6db3f995c788cf0d ]
The VT-d specification (section 7.6) requires that the value in the
Private Data field of a Page Group Response Descriptor must match
the value in the Private Data field of the respective Page Request
Descriptor.
The private data field of a page group response descriptor is set then
immediately cleared in prq_event_thread(). This breaks the rule defined
by the VT-d specification. Fix it by moving clearing code up.
Fixes: 5b438f4ba315d ("iommu/vt-d: Support page request in scalable mode")
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Liu Yi L <yi.l.liu@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20210320024156.640798-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/iommu/intel/svm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 5c95e9693bf5..d79639b5b8a9 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -1071,12 +1071,12 @@ no_pasid: QI_PGRP_RESP_TYPE; resp.qw1 = QI_PGRP_IDX(req->prg_index) | QI_PGRP_LPIG(req->lpig); + resp.qw2 = 0; + resp.qw3 = 0; if (req->priv_data_present) memcpy(&resp.qw2, req->priv_data, sizeof(req->priv_data)); - resp.qw2 = 0; - resp.qw3 = 0; qi_submit_sync(iommu, &resp, 1, 0); } prq_advance: |