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* intel/compiler: Fix passthrough TCS regressions from program renameKenneth Graunke2020-11-111-1/+1
* intel/fs: Fix use of undefined value in fixup_nomask_control_flowJason Ekstrand2020-11-111-1/+2
* nir/builder: Add a name format arg to nir_builder_init_simple_shader().Eric Anholt2020-11-111-2/+1
* nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader().Eric Anholt2020-11-111-1/+1
* intel: Drop the last uses of a mem_ctx in nir_builder_init_simple_shader().Eric Anholt2020-11-111-1/+2
* nir_builder: Return a new builder from nir_builder_init_simple_shader().Eric Anholt2020-11-111-3/+2
* intel/nir: Lower 8-bit ops to 16-bit in NIR on Gen11+Jason Ekstrand2020-11-094-35/+40
* intel/nir: Lower 8-bit scan/reduce ops to 16-bitJason Ekstrand2020-11-092-39/+33
* intel/nir: Refactor lower_bit_size_callbackJason Ekstrand2020-11-091-29/+35
* nir/lower_bit_size: Pass a nir_instr to the callbackJason Ekstrand2020-11-091-1/+5
* intel/fs: Implement nir_intrinsic_{load,store}_shared_block_intelCaio Marcelo de Oliveira Filho2020-11-041-4/+13
* intel/fs: Implement nir_intrinsic_{load,store}_ssbo_block_intelCaio Marcelo de Oliveira Filho2020-11-041-1/+78
* intel/fs: Add surface OWORD BLOCK opcodesCaio Marcelo de Oliveira Filho2020-11-045-25/+156
* intel/fs: Implement nir_intrinsic_{load,store}_global_block_intelCaio Marcelo de Oliveira Filho2020-11-041-0/+95
* intel/fs: Add A64 OWORD BLOCK opcodesCaio Marcelo de Oliveira Filho2020-11-046-3/+114
* intel/compiler: remove branch weight heuristicMarcin Ślusarz2020-11-031-15/+17
* intel/compiler: use C++ template instead of preprocessorMarcin Ślusarz2020-11-034-69/+63
* intel: remove dead codeMarcin Ślusarz2020-11-022-2/+0
* intel/fs: Don't emit_uniformize when getting a constant SSBO indexCaio Marcelo de Oliveira Filho2020-10-291-5/+3
* nir: Rename replicated-result dot-product instructionsIan Romanick2020-10-221-3/+3
* intel/fs: Handle nir_intrinsic_terminateCaio Marcelo de Oliveira Filho2020-10-153-19/+18
* intel/compiler: Remove Gen10-specific codeIan Romanick2020-10-158-47/+7
* intel/compiler, anv: Delete cs_prog_data->slm_sizeKenneth Graunke2020-10-142-2/+0
* intel/fs: Allow constant-propagation into SAMPLEINFO and IMAGE_SIZEJason Ekstrand2020-10-141-0/+2
* intel/fs: Rework scratch handling on Gen9+Jason Ekstrand2020-10-132-16/+111
* intel/fs/ra: Use a set to track added spill/fill instructionsJason Ekstrand2020-10-131-21/+32
* intel/fs/ra: Sanity-check our IP countsJason Ekstrand2020-10-131-0/+8
* intel/fs/ra: Store the last non-spill VGRF nodeJason Ekstrand2020-10-131-1/+4
* intel/fs/ra: Refactor handling of Gen7 scratch readsJason Ekstrand2020-10-131-16/+15
* intel/fs/ra: Increment spill_offset as part of the emit_spill loopJason Ekstrand2020-10-131-2/+4
* intel/fs: Add a SCRATCH_HEADER opcodeJason Ekstrand2020-10-136-33/+86
* intel/fs: Copy the PTSS from g0 for scratch reads/writesJason Ekstrand2020-10-131-0/+5
* radv/aco,nir/lower_subgroups: don't lower electRhys Perry2020-10-131-0/+1
* nir: Add ability to count primitives per stream.Timur Kristóf2020-10-091-1/+2
* nir: Count vertices per stream.Timur Kristóf2020-10-091-1/+1
* nir: Add ability to count emitted GS primitives.Timur Kristóf2020-10-093-3/+3
* intel/fs: Add an option to use dataport messages for UBOsJason Ekstrand2020-10-083-11/+63
* intel/fs: Add an alignment to VARYING_PULL_CONSTANT_LOAD_LOGICALJason Ekstrand2020-10-083-5/+9
* intel/nir: Lower load_global_constant in lower_mem_access_bit_sizesJason Ekstrand2020-10-081-0/+1
* intel/nir: Don't try to emit vector load_scratch instructionsJason Ekstrand2020-10-081-1/+4
* iris: Add support for load_work_dim as a system valueJason Ekstrand2020-10-071-0/+1
* intel: drop likely/unlikely around INTEL_DEBUGMarcin Ślusarz2020-10-068-28/+28
* intel/vec4: Remove leftover code from Gen8+ removal.Vinson Lee2020-10-031-10/+1
* intel/fs: Don't use NoDDClk/NoDDClr for split SHUFFLEsJason Ekstrand2020-10-021-3/+15
* intel/fs: NoMask initialize the address register for shufflesJason Ekstrand2020-10-021-5/+32
* nir: Drop the high_offset argument to the load_store_vectorizer filter.Eric Anholt2020-09-301-1/+1
* nir: Make the load_store_vectorizer provide align_mul + align_offset.Eric Anholt2020-09-301-1/+9
* intel/nir: Use nir control flow helpersConnor Abbott2020-09-301-6/+3
* intel/vec4: Remove everything related to VS_OPCODE_SET_SIMD4X2_HEADER_GEN9Ian Romanick2020-09-286-37/+0
* intel/vec4: Remove all support for Gen8+ [v2]Ian Romanick2020-09-288-285/+87
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