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* libdrm: wrap new flexible syncobj query interface v2Chunming Zhou2019-10-261-0/+18
| | | | | | | | | | v2: nit-picks fix Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: Christian König <Christian.Koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> For the xf86drm.[ch] part : Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* amdgpu: add amdgpu_cs_query_reset_state2 for AMDGPU_CTX_OP_QUERY_STATE2Marek Olšák2019-10-151-0/+15
| | | | | | This is a better GPU reset query. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
* amdgpu: Update amdgpu_bo_handle_type_kms_noimport documentationMichel Dänzer2019-06-251-2/+2
| | | | | | To reflect current reality. Reviewed-by: Christian König <christian.koenig@amd.com>
* wrap transfer interfacesChunming Zhou2019-05-161-0/+22
| | | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* expose timeline signal/export/import interfaces v2Chunming Zhou2019-05-161-0/+51
| | | | | | | | v2: adapt to new one transfer ioctl Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* wrap syncobj timeline query/wait APIs for amdgpu v3Chunming Zhou2019-05-161-0/+39
| | | | | | | | | v2: symbos are stored in lexical order. v3: drop export/import and extra query indirection Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* amdgpu: Add context priority override function.Bas Nieuwenhuizen2019-04-181-0/+15
| | | | | | | | | | | | | | | This way we can override the priority of a single context using a master fd. Since we cannot usefully create an amdgpu device of a master fd without the fd deduplication kicking in this takes a plain fd. This can be used by e.g. radv to get high priority contexts using a master fd from the primary node or a lease. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* fix various typosEric Engestrom2019-04-171-3/+3
| | | | | | | | | | | Saw a couple of typos fixes in the patch DragonFlyBSD carries [1], so I ran codespell (a spell checker for code) on the whole repo. [1] https://github.com/DragonFlyBSD/DPorts/blob/master/graphics/libdrm/files/patch-xf86drm.c Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
* amdgpu: add a faster BO list APIMarek Olšák2019-01-161-0/+54
| | | | | Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
* amdgpu: amdgpu_bo_inc_ref don't return dummy intQiang Yu2018-09-031-4/+1
| | | | | | Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add amdgpu_bo_inc_ref() function.Qiang Yu2018-09-031-1/+14
| | | | | | | | For Pro OGL be able to work with upstream libdrm. Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
* amdgpu: add a function to find bo by cpu mapping (v2)Junwei Zhang2018-08-081-0/+23
| | | | | | | | | Userspace needs to know if the user memory is from BO or malloc. v2: update mutex range and rebase Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add amdgpu_bo_handle_type_kms_noimportMarek Olšák2018-07-251-1/+6
| | | | | Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* Revert "amdgpu:support 16 ibs per submit for PAL/SRIOV"Marek Olšák2018-03-081-1/+1
| | | | | | This reverts commit 924f856a9047b87e8bfdc2867f7fe484e3f71343. Wrong patch.
* amdgpu:support 16 ibs per submit for PAL/SRIOVQiang Yu2018-03-081-1/+1
| | | | | | | | | to support SRIOV and MCBP, need 16 IBs per submit Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu: add AMDGPU_VA_RANGE_HIGHChristian König2018-02-281-0/+1
| | | | | | | Return high addresses if requested and available. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* amdgpu: add amdgpu_query_sw_info for querying high bits of 32-bit address spaceMarek Olšák2018-02-091-0/+21
| | | | Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: Add syncobj reset & signal wrappers.Bas Nieuwenhuizen2017-12-181-0/+28
| | | | Signed-off-by: Dave Airlie <airlied@redhat.com>
* amdgpu: Adding amdgpu_cs_create_syncobj2 to create syncobj as signaled initiallyDavid Mao2017-11-291-0/+15
| | | | | | Signed-off-by: David Mao <david.mao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu: Fix wrappers for AMDGPU_VM IOCTL.Andrey Grodzovsky2017-11-031-2/+2
| | | | | | | | | Rmove amdgpu_context_handle from the interface and use amdgpu_device_handle instead. Uupdate VMID reservation test accordingly. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: Add wrappers for AMDGPU_VM IOCTL.Andrey Grodzovsky2017-10-271-0/+18
| | | | | | | | | v2: Rename wrappers to match the IOCTL naming, fix identation and fix make check error. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: implement context priority for amdgpu_cs_ctx_create2 v3Andres Rodriguez2017-10-201-2/+15
| | | | | | | | | | | | | | | | | Add a new context creation function that allows specifying the context priority. A high priority context has the potential of starving lower priority contexts. The current kernel driver implementation allows only apps that hold CAP_SYS_NICE or DRM_MASTER to acquire a priority above AMDGPU_CTX_PRIORITY_NORMAL. v2: corresponding changes for kernel patch v2 v3: Fixed 'make check' symbol error Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Acked-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* amdgpu: add amdgpu_cs_fence_to_handleMarek Olšák2017-10-121-0/+14
| | | | | | v2: update amdgpu-symbol-check Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* amdgpu: add amdgpu_cs_syncobj_waitMarek Olšák2017-10-121-0/+20
| | | | | | v2: update amdgpu-symbol-check Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* amdgpu: add sync_file import and export functionsMarek Olšák2017-10-121-0/+30
| | | | | | v2: update amdgpu-symbol-check Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: add new low overhead command submission API. (v2)Dave Airlie2017-07-191-0/+30
| | | | | | | | | | | | | | This just sends chunks to the kernel API for a single command stream. This should provide a more future proof and extensible API for command submission. v2: use amdgpu_bo_list_handle, add two helper functions to access bo and context internals. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/amdgpu: add syncobj create/destroy/import/export apisDave Airlie2017-07-191-1/+54
| | | | | | | | These are just wrappers using the amdgpu device handle. Acked-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* amdgpu: add missing extern "C" headersNicolai Hähnle2017-05-161-0/+8
| | | | | | Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
* amdgpu: add the interface of waiting multiple fencesNicolai Hähnle2017-04-181-0/+23
| | | | | | | | | | | | | | | Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> [v2: allow returning the first signaled fence index] Signed-off-by: monk.liu <Monk.Liu@amd.com> [v3: - cleanup *status setting - fix amdgpu symbols check v4: simplify return from amdgpu_cs_wait_fences (suggested by Edward O'Callaghan)] Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu: allow to query GPU sensor related informationSamuel Pitoiset2017-04-071-0/+18
| | | | | | | | | This exposes amdgpu_query_sensor_info(). v2: - add amdgpu_query_sensor_info() to the symbols list Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* amdgpu: add amdgpu_bo_va_op_rawNicolai Hähnle2017-04-031-0/+28
| | | | | | | | | | This variant allows the caller full control over flags and size, and allows passing a NULL bo (for PRT support). Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: Jerry Zhang <Jerry.Zhang@amd.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add the function to get the marketing name (v4)Junwei Zhang2016-11-071-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | This function is used to look up the marking name for a specific board. v2: agd: Squash in subsequent updates to the table. v3: [Michel Dänzer] * Make amdgpu_asic_id_table static, so it's not exported from libdrm_amdgpu.so.1 * Add amdgpu_get_marketing_name to amdgpu-symbols-check * Fix indentation of second line of if statement * Squash in another change removing redundant entries * Change spelling of "RADEON" -> "Radeon" * Remove "(TM)" from a minority of entries v4: [Michel Dänzer] * Use const char* instead of fixed size array for marketing_name (Emil Velikov) Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Flora Cui <Flora.Cui@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu: Fix spelling mistakesEric Engestrom2016-04-071-2/+2
| | | | | | Signed-off-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* amdgpu: add semaphore supportMarek Olšák2016-01-201-0/+65
| | | | | | | | | | | | the semaphore is a binary semaphore. the work flow is: 1. create sem 2. signal sem 3. wait sem, reset sem after signalled 4. destroy sem. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add flag to support 32bit VA address v4Jammy Zhou2015-08-171-0/+5
| | | | | | | | | | | | | | | | | The AMDGPU_VA_RANGE_32_BIT flag is added to request VA range in the 32bit address space for amdgpu_va_range_alloc. The 32bit address space is reserved at initialization time, and managed with a separate VAMGR as part of the global VAMGR. And if no enough VA space available in range above 4GB, this reserved range can be used as fallback. v2: add comment for AMDGPU_VA_RANGE_32_BIT, and add vamgr to va_range v3: rebase to Emil's drm_private series v4: fix one warning Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: squash trivial documentation typoEmil Velikov2015-08-131-1/+1
| | | | | | | Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: cosmetic chances in license boilerplateEmil Velikov2015-08-131-1/+1
| | | | | | | Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: expose the PCI revision IDJammy Zhou2015-08-051-0/+2
| | | | | | | The PCI revision ID can be used to differentiate ASICs. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add VCE harvesting instance queryLeo Liu2015-08-051-0/+2
| | | | | | Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add amdgpu_bo_va_op for va map/unmap support v3Jammy Zhou2015-08-051-28/+26
| | | | | | | | | | | | The following interfaces are changed accordingly: - amdgpu_bo_alloc - amdgpu_create_bo_from_user_mem v2: update the interfaces v3: remove virtual_mc_base_address from amdgpu_bo Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add flags parameter for amdgpu_va_range_allocJammy Zhou2015-08-051-1/+3
| | | | | | | | The flags is added for extensibility to cover some special requirements in the future, i.e, request VA range in the first 4GB of address space Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu : move management of user fence from libdrm to UMDKen Wang2015-08-051-9/+30
| | | | | | Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: use common fence structure for dependencies as well.Christian König2015-08-051-31/+8
| | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: improve the amdgpu_cs_query_fence_status interfaceJammy Zhou2015-08-051-7/+4
| | | | | | | make amdgpu_cs_query_fence reusable to support multi-fence query Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* amdgpu: add va range query interfaceSabre Shao2015-08-051-0/+21
| | | | | | | | amdgpu_va_range_query interface is added so that client can query va range supported by specific device. Signed-off-by: Sabre Shao <Sabre.Shao@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: add va allocation intefacesSabre Shao2015-08-051-0/+66
| | | | | | | | | | Two new interfaces are added to support client request for allocate virtual address without physical memory committed to. The virtual address space can be managed by client itself. Signed-off-by: Sabre Shao <Sabre.Shao@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: allow passing absolute timeouts to amdgpu_cs_query_fence_statusMarek Olšák2015-08-051-1/+6
| | | | | | | Useful when Mesa wants to wait for a lot of fences at the same time and doesn't want to recalculate the relative timeout after every call. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu: remove reference to AMD specific error codesChristian König2015-08-051-32/+2
| | | | | | | We just have never defined any. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: cleanup public interface styleChristian König2015-08-051-136/+90
| | | | | | | | | | Fix some style problems, adjust to a common indentation, reorder two function definitions and remove stale comments. No intended functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* amdgpu: add CS dependencies v2Christian König2015-08-051-0/+36
| | | | | | | | | | This allows the driver to specify on which previous CS to wait. v2: fix spelling in comment Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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