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path: root/compiler/dex/compiler_enums.h
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* ART: extensionWei Wang2015-10-061-0/+1
* Quick: Abolish kMirOpCheckPart2.Vladimir Marko2015-05-071-1/+0
* Write .debug_line section using the new DWARF library.David Srbecky2015-04-011-8/+10
* Quick: Eliminate check-cast guaranteed by instance-of.Vladimir Marko2015-03-181-0/+1
* [optimizing compiler] Add support for volatileCalin Juravle2014-12-191-1/+1
* ARM: Combine multiply accumulate operations.Ningsheng Jian2014-12-111-0/+28
* X86_64 QBE: use RIP addressingMark Mendell2014-12-041-1/+2
* Quick: Use 16-bit Thumb2 PUSH/POP when possible.Vladimir Marko2014-11-261-1/+0
* Skip null check in MarkGCCard() for known non-null values.Vladimir Marko2014-11-241-2/+1
* AArch64: Addressing Cortex-A53 erratum 835769.Matteo Franchin2014-11-181-15/+16
* Tidy RegStorage for X86.Ian Rogers2014-11-081-12/+6
* Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags.Ian Rogers2014-11-031-0/+5
* Rewrite class initialization check elimination.Vladimir Marko2014-10-271-1/+2
* ARM: Use hardfp calling convention between java to java call.Zheng Xu2014-10-241-0/+8
* Merge "ART: Add div/rem zero check elimination flag"Ian Rogers2014-10-241-0/+1
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| * ART: Add div/rem zero check elimination flagRazvan A Lupusoru2014-10-141-0/+1
* | ART: NullCheckElimination should converge with MIR_IGNORE_NULL_CHECKYevgeny Rouban2014-10-151-1/+2
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* ART: Vectorization opcode implementation fixesLupusoru, Razvan A2014-09-031-3/+30
* ART: Update CFG dumper to handle extended betterRazvan A Lupusoru2014-08-291-0/+32
* ART: Add non-temporal store supportJean Christophe Beyler2014-08-261-1/+9
* ART: Implement kMirOpNullCheckRazvan A Lupusoru2014-08-201-0/+6
* AArch64: Add tbz/tbnz and tst.Zheng Xu2014-08-181-0/+1
* Revert "Revert "Enable Load Store Elimination for ARM and ARM64""Serban Constantinescu2014-07-281-0/+5
* ART: Rework quick entrypoint code in Mir2Lir, cleanupAndreas Gampe2014-07-281-4/+0
* Revert "Enable Load Store Elimination for ARM and ARM64"Bill Buzbee2014-07-271-5/+0
* Enable Load Store Elimination for ARM and ARM64Serban Constantinescu2014-07-271-0/+5
* ART: Rework TargetReg(symbolic_reg, wide)Andreas Gampe2014-07-121-0/+8
* Replace memory barriers to better reflect Java needs.Hans Boehm2014-07-111-9/+13
* X86 Backend support for vectorized float and byte 16x16 operationsUdayan Banerji2014-07-081-41/+51
* Revert "Revert "ART: Split out more cases of Load/StoreRef, volatile as param...Andreas Gampe2014-06-241-0/+7
* Revert "ART: Split out more cases of Load/StoreRef, volatile as parameter"Andreas Gampe2014-06-241-7/+0
* ART: Split out more cases of Load/StoreRef, volatile as parameterAndreas Gampe2014-06-231-0/+7
* Arm64 hard-floatbuzbee2014-06-161-0/+2
* Rewrite use/def masks to support 128 bits.Vladimir Marko2014-06-121-16/+0
* x86_64: Hard Float ABI support in QCGDmitry Petrochenko2014-06-071-0/+6
* Quick compiler: reference cleanupbuzbee2014-06-031-0/+1
* AArch64: Enable FLOAT and DOUBLE opcodesSerban Constantinescu2014-05-261-0/+1
* ART: Add support for constant vector literalsMark Mendell2014-05-161-0/+98
* Merge "ART: Add a last item in the MIROptimizationFlagPositions enumeration"Vladimir Marko2014-05-061-1/+2
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| * ART: Add a last item in the MIROptimizationFlagPositions enumerationJean Christophe Beyler2014-05-021-1/+2
* | Quick compiler: allocate doubles as doublesbuzbee2014-05-051-11/+9
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* Merge "Update load/store utilities for 64-bit backends"buzbee2014-04-221-2/+4
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| * Update load/store utilities for 64-bit backendsbuzbee2014-04-221-2/+4
* | Revert "Revert "Use LIRSlowPath for throwing ArrayOutOfBoundsException.""Mingyao Yang2014-04-181-2/+0
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* Revert "Use LIRSlowPath for throwing ArrayOutOfBoundsException."Brian Carlstrom2014-04-171-0/+2
* Use LIRSlowPath for throwing ArrayOutOfBoundsException.Mingyao Yang2014-04-171-2/+0
* Use LIRSlowPath for throwing NPE.Mingyao Yang2014-04-161-1/+0
* Revert "Revert "Revert "Use trampolines for calls to helpers"""Dave Allison2014-04-091-2/+0
* Revert "Revert "Use trampolines for calls to helpers""Dave Allison2014-04-091-0/+2
* Use LIRSlowPath for throwing div by zero exception.Mingyao Yang2014-04-071-1/+0
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