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| author | Linux Build Service Account <lnxbuild@localhost> | 2015-09-02 21:16:36 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2015-09-02 21:16:36 -0700 |
| commit | 02f2f211d1f7add2ed34cc6b54790c8441804c07 (patch) | |
| tree | 0d4902b90b16694dc899b726cee670786d09dd17 /libgralloc/alloc_controller.cpp | |
| parent | ca561dbb7b441279e59ce6adc1ff860415a866c1 (diff) | |
| parent | 521ce35904c9e01580e5cf706546490e15bf1652 (diff) | |
| download | android_hardware_qcom_display-02f2f211d1f7add2ed34cc6b54790c8441804c07.tar.gz android_hardware_qcom_display-02f2f211d1f7add2ed34cc6b54790c8441804c07.tar.bz2 android_hardware_qcom_display-02f2f211d1f7add2ed34cc6b54790c8441804c07.zip | |
Merge "gralloc: Use adreno_utils api for NV21 and NV12 alignment"
Diffstat (limited to 'libgralloc/alloc_controller.cpp')
| -rw-r--r-- | libgralloc/alloc_controller.cpp | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/libgralloc/alloc_controller.cpp b/libgralloc/alloc_controller.cpp index 8eaf7f4c8..e6693c9d6 100644 --- a/libgralloc/alloc_controller.cpp +++ b/libgralloc/alloc_controller.cpp @@ -105,6 +105,7 @@ AdrenoMemInfo::AdrenoMemInfo() LINK_adreno_isMacroTilingSupportedByGpu = NULL; LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL; LINK_adreno_isUBWCSupportedByGpu = NULL; + LINK_adreno_get_gpu_pixel_alignment = NULL; libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW); if (libadreno_utils) { @@ -119,6 +120,8 @@ AdrenoMemInfo::AdrenoMemInfo() "compute_compressedfmt_aligned_width_and_height"); *(void **)&LINK_adreno_isUBWCSupportedByGpu = ::dlsym(libadreno_utils, "isUBWCSupportedByGpu"); + *(void **)&LINK_adreno_get_gpu_pixel_alignment = + ::dlsym(libadreno_utils, "get_gpu_pixel_alignment"); } // Check if the overriding property debug.gralloc.gfx_ubwc_disable @@ -214,11 +217,18 @@ void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format, aligned_w = width; aligned_h = height; + int alignment = 32; switch (format) { case HAL_PIXEL_FORMAT_YCrCb_420_SP: + case HAL_PIXEL_FORMAT_YCbCr_420_SP: + if (LINK_adreno_get_gpu_pixel_alignment) { + alignment = LINK_adreno_get_gpu_pixel_alignment(); + } + aligned_w = ALIGN(width, alignment); + break; case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: - aligned_w = ALIGN(width, 32); + aligned_w = ALIGN(width, alignment); break; case HAL_PIXEL_FORMAT_RAW16: aligned_w = ALIGN(width, 16); @@ -229,7 +239,6 @@ void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format, case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: aligned_w = ALIGN(width, 128); break; - case HAL_PIXEL_FORMAT_YCbCr_420_SP: case HAL_PIXEL_FORMAT_YV12: case HAL_PIXEL_FORMAT_YCbCr_422_SP: case HAL_PIXEL_FORMAT_YCrCb_422_SP: |