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| author | Harish Mahendrakar <harish.mahendrakar@ittiam.com> | 2016-05-20 16:41:17 +0530 |
|---|---|---|
| committer | MSe <mse1969@posteo.de> | 2018-01-10 20:56:46 +0100 |
| commit | 6a73e1e1443309687799cff7c958ee2386ca19ae (patch) | |
| tree | 8609192506c1bac25fe09cdec0be3baf5fb84b89 /common/arm | |
| parent | 57e131c5cda561dcb8688e23452134bebb3baf4e (diff) | |
| download | android_external_libhevc-6a73e1e1443309687799cff7c958ee2386ca19ae.tar.gz android_external_libhevc-6a73e1e1443309687799cff7c958ee2386ca19ae.tar.bz2 android_external_libhevc-6a73e1e1443309687799cff7c958ee2386ca19ae.zip | |
Fixed few issues in SAO arm assemblies
There were few mismatches seen because of wrong clipping and wrong increments
in SAO assemblies
Change-Id: I8ab28d847b1708b6949eac514f99e475e792cde1
Diffstat (limited to 'common/arm')
| -rw-r--r-- | common/arm/ihevc_sao_edge_offset_class2_chroma.s | 4 | ||||
| -rw-r--r-- | common/arm/ihevc_sao_edge_offset_class3.s | 4 | ||||
| -rw-r--r-- | common/arm/ihevc_sao_edge_offset_class3_chroma.s | 4 |
3 files changed, 12 insertions, 0 deletions
diff --git a/common/arm/ihevc_sao_edge_offset_class2_chroma.s b/common/arm/ihevc_sao_edge_offset_class2_chroma.s index b74a8f6..6a301cb 100644 --- a/common/arm/ihevc_sao_edge_offset_class2_chroma.s +++ b/common/arm/ihevc_sao_edge_offset_class2_chroma.s @@ -829,6 +829,10 @@ SRC_LEFT_LOOP_WD_16_HT_4: SUBS r6,r6,#16 @Decrement the wd loop count by 16 BLE RE_ASSINING_LOOP @Jump to re-assigning loop + LDR r7,[sp,#0x114] @Loads wd + LDR r0,[sp,#0x02] @Loads *pu1_src + SUB r7,r7,r6 + ADD r0,r0,r7 BGT WD_16_HT_4_LOOP diff --git a/common/arm/ihevc_sao_edge_offset_class3.s b/common/arm/ihevc_sao_edge_offset_class3.s index de09d6c..f3482dc 100644 --- a/common/arm/ihevc_sao_edge_offset_class3.s +++ b/common/arm/ihevc_sao_edge_offset_class3.s @@ -691,6 +691,10 @@ SRC_LEFT_LOOP_WD_16_HT_4: SUBS r6,r6,#16 @Decrement the wd loop count by 16 BLE RE_ASSINING_LOOP @Jump to re-assigning loop + LDR r7,[sp,#0xD0] @Loads wd + LDR r0,[sp,#0x90] @Loads *pu1_src + SUB r7,r7,r6 + ADD r0,r0,r7 BGT WD_16_HT_4_LOOP @If not equal jump to width_loop diff --git a/common/arm/ihevc_sao_edge_offset_class3_chroma.s b/common/arm/ihevc_sao_edge_offset_class3_chroma.s index 62f40d1..fe3b459 100644 --- a/common/arm/ihevc_sao_edge_offset_class3_chroma.s +++ b/common/arm/ihevc_sao_edge_offset_class3_chroma.s @@ -851,6 +851,10 @@ SRC_LEFT_LOOP_WD_16_HT_4: SUBS r6,r6,#16 @Decrement the wd loop count by 16 BLE RE_ASSINING_LOOP @Jump to re-assigning loop + LDR r7,[sp,#0x114] @Loads wd + LDR r0,[sp,#0x02] @Loads *pu1_src + SUB r7,r7,r6 + ADD r0,r0,r7 BGT WD_16_HT_4_LOOP @If not equal jump to width_loop WIDTH_RESIDUE: |