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| author | Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org> | 2014-11-25 19:18:50 +0100 |
|---|---|---|
| committer | Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org> | 2014-12-01 20:46:10 +0100 |
| commit | d91eedb8cdcdd3d4f23379517752d48fa5791604 (patch) | |
| tree | 4d08c14c2079718a901f9b802f6fa673db2329eb /common/arm/ihevc_sao_edge_offset_class3_chroma.s | |
| parent | fee3b565f9bdcab93cce9661670da9cb95e6cdbd (diff) | |
| download | android_external_libhevc-d91eedb8cdcdd3d4f23379517752d48fa5791604.tar.gz android_external_libhevc-d91eedb8cdcdd3d4f23379517752d48fa5791604.tar.bz2 android_external_libhevc-d91eedb8cdcdd3d4f23379517752d48fa5791604.zip | |
Update assembly files to unified syntax
This allows them to be built with clang's internal assembler.
Also, pass -I flags to the assembler explicitly and stop disabling
clang.
Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
Change-Id: I67dfd0d1b44217af6cf159f4d8810b3c2173702b
Diffstat (limited to 'common/arm/ihevc_sao_edge_offset_class3_chroma.s')
| -rw-r--r-- | common/arm/ihevc_sao_edge_offset_class3_chroma.s | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/common/arm/ihevc_sao_edge_offset_class3_chroma.s b/common/arm/ihevc_sao_edge_offset_class3_chroma.s index 2ecabe9..6561a8a 100644 --- a/common/arm/ihevc_sao_edge_offset_class3_chroma.s +++ b/common/arm/ihevc_sao_edge_offset_class3_chroma.s @@ -61,6 +61,7 @@ @r8=> ht .text +.syntax unified .p2align 2 .extern gi1_table_edge_idx @@ -294,7 +295,7 @@ WIDTH_LOOP_16: CMP r6,r7 @col == wd LDR r5,[sp,#0x108] @Loads pu1_avail - LDREQB r8,[r5] @pu1_avail[0] + LDRBEQ r8,[r5] @pu1_avail[0] MOVNE r8,#-1 VMOV.8 D8[0],r8 @au1_mask = vsetq_lane_s8(-1, au1_mask, 0) @@ -688,7 +689,7 @@ WD_16_HT_4_LOOP: LDR r5,[sp,#0x108] @Loads pu1_avail CMP r6,r7 @col == wd - LDREQB r8,[r5] @pu1_avail[0] + LDRBEQ r8,[r5] @pu1_avail[0] MOVNE r8,#-1 VMOV.8 D8[0],r8 @au1_mask = vsetq_lane_s8(-1, au1_mask, 0) @@ -858,7 +859,7 @@ WIDTH_RESIDUE: LDR r5,[sp,#0x108] @Loads pu1_avail CMP r6,r7 @wd_residue == wd - LDREQB r8,[r5] @pu1_avail[0] + LDRBEQ r8,[r5] @pu1_avail[0] MOVNE r8,#-1 LDRB r11,[r5,#1] @pu1_avail[1] |