39 files changed, 86 insertions, 51 deletions
diff --git a/vm/compiler/codegen/CodegenFactory.c b/vm/compiler/codegen/CodegenFactory.cpp
index ef7a0a976..ef7a0a976 100644
--- a/vm/compiler/codegen/CodegenFactory.c
+++ b/vm/compiler/codegen/CodegenFactory.cpp
diff --git a/vm/compiler/codegen/CompilerCodegen.h b/vm/compiler/codegen/CompilerCodegen.h
index efa913f90..8223d2a9f 100644
--- a/vm/compiler/codegen/CompilerCodegen.h
+++ b/vm/compiler/codegen/CompilerCodegen.h
@@ -19,6 +19,10 @@
 
 #include "compiler/CompilerIR.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* Maximal number of switch cases to have inline chains */
 #define MAX_CHAINED_SWITCH_CASES 64
 
@@ -34,6 +38,9 @@ void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit);
 /* Assemble LIR into machine code */
 void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info);
 
+/* Perform translation chain operation. */
+void* dvmJitChain(void* tgtAddr, u4* branchAddr);
+
 /* Install class objects in the literal pool */
 void dvmJitInstallClassObjectPointers(CompilationUnit *cUnit,
                                       char *codeAddress);
@@ -68,4 +75,8 @@ int dvmCompilerTargetOptHint(int key);
 /* Implemented in codegen/<target>/<target_variant>/ArchVariant.c */
 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* _DALVIK_VM_COMPILERCODEGEN_H_ */
diff --git a/vm/compiler/codegen/RallocUtil.c b/vm/compiler/codegen/RallocUtil.cpp
index 27d1f0597..27d1f0597 100644
--- a/vm/compiler/codegen/RallocUtil.c
+++ b/vm/compiler/codegen/RallocUtil.cpp
diff --git a/vm/compiler/codegen/arm/ArchFactory.c b/vm/compiler/codegen/arm/ArchFactory.cpp
index 5a03b17ad..5a03b17ad 100644
--- a/vm/compiler/codegen/arm/ArchFactory.c
+++ b/vm/compiler/codegen/arm/ArchFactory.cpp
diff --git a/vm/compiler/codegen/arm/ArchUtility.c b/vm/compiler/codegen/arm/ArchUtility.cpp
index edcbf86a0..f3a2a4b37 100644
--- a/vm/compiler/codegen/arm/ArchUtility.c
+++ b/vm/compiler/codegen/arm/ArchUtility.cpp
@@ -18,7 +18,7 @@
 #include "libdex/DexOpcodes.h"
 #include "ArmLIR.h"
 
-static char *shiftNames[4] = {
+static const char *shiftNames[4] = {
     "lsl",
     "lsr",
     "asr",
@@ -73,14 +73,14 @@ static int expandImmediate(int value)
  * Interpret a format string and build a string no longer than size
  * See format key in Assemble.c.
  */
-static void buildInsnString(char *fmt, ArmLIR *lir, char* buf,
+static void buildInsnString(const char *fmt, ArmLIR *lir, char* buf,
                             unsigned char *baseAddr, int size)
 {
     int i;
     char *bufEnd = &buf[size-1];
-    char *fmtEnd = &fmt[strlen(fmt)];
+    const char *fmtEnd = &fmt[strlen(fmt)];
     char tbuf[256];
-    char *name;
+    const char *name;
     char nc;
     while (fmt < fmtEnd) {
         int operand;
diff --git a/vm/compiler/codegen/arm/ArmLIR.h b/vm/compiler/codegen/arm/ArmLIR.h
index c47c29177..864f5b63a 100644
--- a/vm/compiler/codegen/arm/ArmLIR.h
+++ b/vm/compiler/codegen/arm/ArmLIR.h
@@ -734,8 +734,8 @@ typedef struct ArmEncodingMap {
     } fieldLoc[4];
     ArmOpcode opcode;
     int flags;
-    char *name;
-    char* fmt;
+    const char* name;
+    const char* fmt;
     int size;
 } ArmEncodingMap;
 
diff --git a/vm/compiler/codegen/arm/ArmRallocUtil.c b/vm/compiler/codegen/arm/ArmRallocUtil.cpp
index 3a5afa28c..3a5afa28c 100644
--- a/vm/compiler/codegen/arm/ArmRallocUtil.c
+++ b/vm/compiler/codegen/arm/ArmRallocUtil.cpp
diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.cpp
index 83fec336b..16804ba99 100644
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.cpp
@@ -1754,6 +1754,8 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
     newRechainCount = PREDICTED_CHAIN_COUNTER_AVOID;
     goto done;
 #else
+    PredictedChainingCell newCell;
+    int baseAddr, branchOffset, tgtAddr;
     if (dvmIsNativeMethod(method)) {
         UNPROTECT_CODE_CACHE(cell, sizeof(*cell));
 
@@ -1768,7 +1770,7 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
         PROTECT_CODE_CACHE(cell, sizeof(*cell));
         goto done;
     }
-    int tgtAddr = (int) dvmJitGetTraceAddr(method->insns);
+    tgtAddr = (int) dvmJitGetTraceAddr(method->insns);
 
     /*
      * Compilation not made yet for the callee. Reset the counter to a small
@@ -1782,14 +1784,12 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
         goto done;
     }
 
-    PredictedChainingCell newCell;
-
     if (cell->clazz == NULL) {
         newRechainCount = self->icRechainCount;
     }
 
-    int baseAddr = (int) cell + 4;   // PC is cur_addr + 4
-    int branchOffset = tgtAddr - baseAddr;
+    baseAddr = (int) cell + 4;   // PC is cur_addr + 4
+    branchOffset = tgtAddr - baseAddr;
 
     newCell.branch = assembleChainingBranch(branchOffset, true);
     newCell.clazz = clazz;
diff --git a/vm/compiler/codegen/arm/CalloutHelper.h b/vm/compiler/codegen/arm/CalloutHelper.h
index 931cf0f7e..3bfb299e2 100644
--- a/vm/compiler/codegen/arm/CalloutHelper.h
+++ b/vm/compiler/codegen/arm/CalloutHelper.h
@@ -19,6 +19,10 @@
 #ifndef _DALVIK_VM_COMPILER_CODEGEN_ARM_CALLOUT_HELPER_H
 #define _DALVIK_VM_COMPILER_CODEGEN_ARM_CALLOUT_HELPER_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /*
  * Declare/comment prototypes of all native callout functions invoked by the
  * JIT'ed code here and use the LOAD_FUNC_ADDR macro to load the address into
@@ -121,4 +125,8 @@ double sqrt(double x);  // INLINE_MATH_SQRT
  *      dvmLockObject           // MONITOR_ENTER
  */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_CALLOUT_HELPER_H */
diff --git a/vm/compiler/codegen/arm/Codegen.h b/vm/compiler/codegen/arm/Codegen.h
index 330619b29..afeb340d4 100644
--- a/vm/compiler/codegen/arm/Codegen.h
+++ b/vm/compiler/codegen/arm/Codegen.h
@@ -25,6 +25,10 @@
 #include "compiler/CompilerIR.h"
 #include "CalloutHelper.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(_CODEGEN_C)
 /*
  * loadConstant() sometimes needs to add a small imm to a pre-existing constant
@@ -63,3 +67,7 @@ extern void dvmCompilerSetupResourceMasks(ArmLIR *lir);
 
 extern ArmLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest,
                                           int rSrc);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/vm/compiler/codegen/arm/CodegenCommon.c b/vm/compiler/codegen/arm/CodegenCommon.cpp
index ae41fe9af..ae41fe9af 100644
--- a/vm/compiler/codegen/arm/CodegenCommon.c
+++ b/vm/compiler/codegen/arm/CodegenCommon.cpp
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.cpp
index 6060ab788..c38b16a46 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.cpp
@@ -769,7 +769,7 @@ static bool genArithOpInt(CompilationUnit *cUnit, MIR *mir,
     bool checkZero = false;
     bool unary = false;
     int retReg = r0;
-    void *callTgt;
+    int (*callTgt)(int, int);
     RegLocation rlResult;
     bool shiftOp = false;
 
@@ -2155,7 +2155,7 @@ static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             cond = kArmCondLe;
             break;
         default:
-            cond = 0;
+            cond = (ArmConditionCode)0;
             LOGE("Unexpected opcode (%d) for Fmt21t\n", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
@@ -2294,7 +2294,7 @@ static bool handleFmt22b_Fmt22s(CompilationUnit *cUnit, MIR *mir)
     RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
     RegLocation rlResult;
     int lit = mir->dalvikInsn.vC;
-    OpKind op = 0;      /* Make gcc happy */
+    OpKind op = (OpKind)0;      /* Make gcc happy */
     int shiftOp = false;
     bool isDiv = false;
 
@@ -2700,7 +2700,7 @@ static bool handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             cond = kArmCondLe;
             break;
         default:
-            cond = 0;
+            cond = (ArmConditionCode)0;
             LOGE("Unexpected opcode (%d) for Fmt22t\n", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
@@ -3904,7 +3904,7 @@ static void handlePCReconstruction(CompilationUnit *cUnit,
     }
 }
 
-static char *extendedMIROpNames[kMirOpLast - kMirOpFirst] = {
+static const char *extendedMIROpNames[kMirOpLast - kMirOpFirst] = {
     "kMirOpPhi",
     "kMirOpNullNRangeUpCheck",
     "kMirOpNullNRangeDownCheck",
@@ -4135,7 +4135,7 @@ static void handleExtendedMIR(CompilationUnit *cUnit, MIR *mir)
     strcpy(msg, extendedMIROpNames[opOffset]);
     newLIR1(cUnit, kArmPseudoExtended, (int) msg);
 
-    switch (mir->dalvikInsn.opcode) {
+    switch ((ExtendedMIROpcode)mir->dalvikInsn.opcode) {
         case kMirOpPhi: {
             char *ssaString = dvmCompilerGetSSAString(cUnit, mir->ssaRep);
             newLIR1(cUnit, kArmPseudoSSARep, (int) ssaString);
@@ -4238,6 +4238,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
     /* Used to hold the labels of each block */
     ArmLIR *labelList =
         (ArmLIR *) dvmCompilerNew(sizeof(ArmLIR) * cUnit->numBlocks, true);
+    ArmLIR *headLIR = NULL;
     GrowableList chainingListByType[kChainingCellGap];
     int i;
 
@@ -4365,15 +4366,12 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
             continue;
         }
 
-        ArmLIR *headLIR = NULL;
-        BasicBlock *nextBB = bb;
-
         /*
          * Try to build a longer optimization unit. Currently if the previous
          * block ends with a goto, we continue adding instructions and don't
          * reset the register allocation pool.
          */
-        for (; nextBB != NULL; nextBB = cUnit->nextCodegenBlock) {
+        for (BasicBlock *nextBB = bb; nextBB != NULL; nextBB = cUnit->nextCodegenBlock) {
             bb = nextBB;
             bb->visited = true;
             cUnit->nextCodegenBlock = NULL;
@@ -4389,16 +4387,15 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                     dvmCompilerResetDefTracking(cUnit);
                 }
 
-                if (mir->dalvikInsn.opcode >= kMirOpFirst) {
+                if ((int)mir->dalvikInsn.opcode >= (int)kMirOpFirst) {
                     handleExtendedMIR(cUnit, mir);
                     continue;
                 }
 
-
                 Opcode dalvikOpcode = mir->dalvikInsn.opcode;
                 InstructionFormat dalvikFormat =
                     dexGetFormatFromOpcode(dalvikOpcode);
-                char *note;
+                const char *note;
                 if (mir->OptimizationFlags & MIR_INLINED) {
                     note = " (I)";
                 } else if (mir->OptimizationFlags & MIR_INLINED_PRED) {
@@ -4690,7 +4687,7 @@ bool dvmCompilerDoWork(CompilerWorkOrder *work)
             break;
         }
         case kWorkOrderProfileMode:
-            dvmJitChangeProfileMode((TraceProfilingModes)work->info);
+            dvmJitChangeProfileMode((TraceProfilingModes)(int)work->info);
             isCompile = false;
             break;
         default:
diff --git a/vm/compiler/codegen/arm/FP/Thumb2VFP.c b/vm/compiler/codegen/arm/FP/Thumb2VFP.cpp
index 61698c2aa..aed4950a1 100644
--- a/vm/compiler/codegen/arm/FP/Thumb2VFP.c
+++ b/vm/compiler/codegen/arm/FP/Thumb2VFP.cpp
@@ -54,7 +54,8 @@ static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
     rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
     rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
     rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR3(cUnit, op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
+    newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg,
+            rlSrc2.lowReg);
     storeValue(cUnit, rlDest, rlResult);
     return false;
 }
@@ -100,7 +101,7 @@ static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
     rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
     assert(rlDest.wide);
     assert(rlResult.wide);
-    newLIR3(cUnit, op, S2D(rlResult.lowReg, rlResult.highReg),
+    newLIR3(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg),
             S2D(rlSrc1.lowReg, rlSrc1.highReg),
             S2D(rlSrc2.lowReg, rlSrc2.highReg));
     storeValueWide(cUnit, rlDest, rlResult);
@@ -169,12 +170,13 @@ static bool genConversion(CompilationUnit *cUnit, MIR *mir)
     if (longDest) {
         rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
         rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
-        newLIR2(cUnit, op, S2D(rlResult.lowReg, rlResult.highReg), srcReg);
+        newLIR2(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg),
+                srcReg);
         storeValueWide(cUnit, rlDest, rlResult);
     } else {
         rlDest = dvmCompilerGetDest(cUnit, mir, 0);
         rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
-        newLIR2(cUnit, op, rlResult.lowReg, srcReg);
+        newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcReg);
         storeValue(cUnit, rlDest, rlResult);
     }
     return false;
diff --git a/vm/compiler/codegen/arm/FP/ThumbPortableFP.c b/vm/compiler/codegen/arm/FP/ThumbPortableFP.cpp
index 7aac8e6d5..7aac8e6d5 100644
--- a/vm/compiler/codegen/arm/FP/ThumbPortableFP.c
+++ b/vm/compiler/codegen/arm/FP/ThumbPortableFP.cpp
diff --git a/vm/compiler/codegen/arm/FP/ThumbVFP.c b/vm/compiler/codegen/arm/FP/ThumbVFP.cpp
index f685f2469..f685f2469 100644
--- a/vm/compiler/codegen/arm/FP/ThumbVFP.c
+++ b/vm/compiler/codegen/arm/FP/ThumbVFP.cpp
diff --git a/vm/compiler/codegen/arm/GlobalOptimizations.c b/vm/compiler/codegen/arm/GlobalOptimizations.cpp
index e52bd8a49..e52bd8a49 100644
--- a/vm/compiler/codegen/arm/GlobalOptimizations.c
+++ b/vm/compiler/codegen/arm/GlobalOptimizations.cpp
diff --git a/vm/compiler/codegen/arm/LocalOptimizations.c b/vm/compiler/codegen/arm/LocalOptimizations.cpp
index 4c0354ac8..4c0354ac8 100644
--- a/vm/compiler/codegen/arm/LocalOptimizations.c
+++ b/vm/compiler/codegen/arm/LocalOptimizations.cpp
diff --git a/vm/compiler/codegen/arm/Thumb/Factory.c b/vm/compiler/codegen/arm/Thumb/Factory.cpp
index 7b51df160..7b51df160 100644
--- a/vm/compiler/codegen/arm/Thumb/Factory.c
+++ b/vm/compiler/codegen/arm/Thumb/Factory.cpp
diff --git a/vm/compiler/codegen/arm/Thumb/Gen.c b/vm/compiler/codegen/arm/Thumb/Gen.cpp
index 18ef76286..18ef76286 100644
--- a/vm/compiler/codegen/arm/Thumb/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb/Gen.cpp
diff --git a/vm/compiler/codegen/arm/Thumb/Ralloc.c b/vm/compiler/codegen/arm/Thumb/Ralloc.cpp
index 676997260..676997260 100644
--- a/vm/compiler/codegen/arm/Thumb/Ralloc.c
+++ b/vm/compiler/codegen/arm/Thumb/Ralloc.cpp
diff --git a/vm/compiler/codegen/arm/Thumb2/Factory.c b/vm/compiler/codegen/arm/Thumb2/Factory.cpp
index 80454508f..80454508f 100644
--- a/vm/compiler/codegen/arm/Thumb2/Factory.c
+++ b/vm/compiler/codegen/arm/Thumb2/Factory.cpp
diff --git a/vm/compiler/codegen/arm/Thumb2/Gen.c b/vm/compiler/codegen/arm/Thumb2/Gen.cpp
index f54b7eb49..fcf0fe34c 100644
--- a/vm/compiler/codegen/arm/Thumb2/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb2/Gen.cpp
@@ -165,7 +165,7 @@ void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
  * is not met.
  */
 static ArmLIR *genIT(CompilationUnit *cUnit, ArmConditionCode code,
-                     char *guide)
+                     const char *guide)
 {
     int mask;
     int condBit = code & 1;
diff --git a/vm/compiler/codegen/arm/Thumb2/Ralloc.c b/vm/compiler/codegen/arm/Thumb2/Ralloc.cpp
index 6adfd62a1..6adfd62a1 100644
--- a/vm/compiler/codegen/arm/Thumb2/Ralloc.c
+++ b/vm/compiler/codegen/arm/Thumb2/Ralloc.cpp
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
index 3d8505221..3d8505221 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c b/vm/compiler/codegen/arm/armv5te-vfp/Codegen.cpp
index a2d77eadb..a2d77eadb 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/Codegen.cpp
diff --git a/vm/compiler/codegen/arm/armv5te/ArchVariant.c b/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
index 57a8c8a1d..57a8c8a1d 100644
--- a/vm/compiler/codegen/arm/armv5te/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
diff --git a/vm/compiler/codegen/arm/armv5te/Codegen.c b/vm/compiler/codegen/arm/armv5te/Codegen.cpp
index f74d968ca..f74d968ca 100644
--- a/vm/compiler/codegen/arm/armv5te/Codegen.c
+++ b/vm/compiler/codegen/arm/armv5te/Codegen.cpp
diff --git a/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.c b/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.cpp
index 20779f3e9..20779f3e9 100644
--- a/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.c
+++ b/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.cpp
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
index 59d7c95cd..59d7c95cd 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c b/vm/compiler/codegen/arm/armv7-a-neon/Codegen.cpp
index 439add5ef..439add5ef 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/Codegen.cpp
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.c b/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
index 98d97d871..98d97d871 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
index 59d7c95cd..245ff78c8 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+extern "C" void dvmCompilerTemplateStart(void);
+
 /*
  * Determine the initial instruction set to be used for this trace.
  * Later components may decide to change this.
@@ -23,16 +25,15 @@ JitInstructionSetType dvmCompilerInstructionSet(void)
     return DALVIK_JIT_THUMB2;
 }
 
-/* Architecture-specific initializations and checks go here */
-bool dvmCompilerArchVariantInit(void)
-{
-    /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
-#define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
+/* First, declare dvmCompiler_TEMPLATE_XXX for each template */
+#define JIT_TEMPLATE(X) extern "C" void dvmCompiler_TEMPLATE_##X();
 #include "../../../template/armv5te-vfp/TemplateOpList.h"
 #undef JIT_TEMPLATE
 
+/* Architecture-specific initializations and checks go here */
+bool dvmCompilerArchVariantInit(void)
+{
     int i = 0;
-    extern void dvmCompilerTemplateStart(void);
 
     /*
      * Then, populate the templateEntryOffsets array with the offsets from the
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.h b/vm/compiler/codegen/arm/armv7-a/ArchVariant.h
index fa0121057..747ecc18a 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.h
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.h
@@ -17,6 +17,10 @@
 #ifndef _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H
 #define _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* Create the TemplateOpcode enum */
 #define JIT_TEMPLATE(X) TEMPLATE_##X,
 typedef enum {
@@ -31,4 +35,8 @@ typedef enum {
 } TemplateOpcode;
 #undef JIT_TEMPLATE
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H */
diff --git a/vm/compiler/codegen/arm/armv7-a/Codegen.c b/vm/compiler/codegen/arm/armv7-a/Codegen.cpp
index 36771ef56..e1b0ee9a6 100644
--- a/vm/compiler/codegen/arm/armv7-a/Codegen.c
+++ b/vm/compiler/codegen/arm/armv7-a/Codegen.cpp
@@ -29,28 +29,28 @@
 #include "ArchVariant.h"
 
 /* Arm codegen building blocks */
-#include "../CodegenCommon.c"
+#include "../CodegenCommon.cpp"
 
 /* Thumb2-specific factory utilities */
-#include "../Thumb2/Factory.c"
+#include "../Thumb2/Factory.cpp"
 /* Target independent factory utilities */
-#include "../../CodegenFactory.c"
+#include "../../CodegenFactory.cpp"
 /* Arm-specific factory utilities */
-#include "../ArchFactory.c"
+#include "../ArchFactory.cpp"
 
 /* Thumb2-specific codegen routines */
-#include "../Thumb2/Gen.c"
+#include "../Thumb2/Gen.cpp"
 /* Thumb2+VFP codegen routines */
-#include "../FP/Thumb2VFP.c"
+#include "../FP/Thumb2VFP.cpp"
 
 /* Thumb2-specific register allocation */
-#include "../Thumb2/Ralloc.c"
+#include "../Thumb2/Ralloc.cpp"
 
 /* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../CodegenDriver.c"
+#include "../CodegenDriver.cpp"
 
 /* Driver for method-based JIT */
-#include "../armv7-a-neon/MethodCodegenDriver.c"
+#include "../armv7-a-neon/MethodCodegenDriver.cpp"
 
 /* Architecture manifest */
-#include "ArchVariant.c"
+#include "ArchVariant.cpp"
diff --git a/vm/compiler/codegen/x86/ArchUtility.c b/vm/compiler/codegen/x86/ArchUtility.cpp
index f7c48d628..f7c48d628 100644
--- a/vm/compiler/codegen/x86/ArchUtility.c
+++ b/vm/compiler/codegen/x86/ArchUtility.cpp
diff --git a/vm/compiler/codegen/x86/Assemble.c b/vm/compiler/codegen/x86/Assemble.cpp
index 03edbf109..03edbf109 100644
--- a/vm/compiler/codegen/x86/Assemble.c
+++ b/vm/compiler/codegen/x86/Assemble.cpp
diff --git a/vm/compiler/codegen/x86/CodegenDriver.c b/vm/compiler/codegen/x86/CodegenDriver.cpp
index a5ef56afb..a5ef56afb 100644
--- a/vm/compiler/codegen/x86/CodegenDriver.c
+++ b/vm/compiler/codegen/x86/CodegenDriver.cpp
diff --git a/vm/compiler/codegen/x86/ia32/ArchVariant.c b/vm/compiler/codegen/x86/ia32/ArchVariant.cpp
index 90f14a33a..4dd528ead 100644
--- a/vm/compiler/codegen/x86/ia32/ArchVariant.c
+++ b/vm/compiler/codegen/x86/ia32/ArchVariant.cpp
@@ -28,14 +28,14 @@ JitInstructionSetType dvmCompilerInstructionSet(void)
     return DALVIK_JIT_IA32;
 }
 
-/* Architecture-specific initializations and checks go here */
-bool dvmCompilerArchVariantInit(void)
-{
-    /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
-#define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
+/* First, declare dvmCompiler_TEMPLATE_XXX for each template */
+#define JIT_TEMPLATE(X) extern "C" void dvmCompiler_TEMPLATE_##X();
 #include "../../../template/ia32/TemplateOpList.h"
 #undef JIT_TEMPLATE
 
+/* Architecture-specific initializations and checks go here */
+bool dvmCompilerArchVariantInit(void)
+{
     int i = 0;
     extern void dvmCompilerTemplateStart(void);
 
diff --git a/vm/compiler/codegen/x86/ia32/Codegen.c b/vm/compiler/codegen/x86/ia32/Codegen.cpp
index 4c2a759f5..4c2a759f5 100644
--- a/vm/compiler/codegen/x86/ia32/Codegen.c
+++ b/vm/compiler/codegen/x86/ia32/Codegen.cpp