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-rw-r--r--vm/compiler/codegen/arm/ArmLIR.h4
-rw-r--r--vm/compiler/codegen/arm/Thumb/Gen.c6
-rw-r--r--vm/compiler/codegen/arm/Thumb2/Gen.c6
3 files changed, 0 insertions, 16 deletions
diff --git a/vm/compiler/codegen/arm/ArmLIR.h b/vm/compiler/codegen/arm/ArmLIR.h
index 213344cd8..4f3434dec 100644
--- a/vm/compiler/codegen/arm/ArmLIR.h
+++ b/vm/compiler/codegen/arm/ArmLIR.h
@@ -119,10 +119,6 @@ typedef struct RegisterPool {
int numFPTemps;
RegisterInfo *FPTemps;
int nextFPTemp;
- int numCoreRegs;
- RegisterInfo *coreRegs;
- int numFPRegs;
- RegisterInfo *FPRegs;
} RegisterPool;
typedef enum ResourceEncodingPos {
diff --git a/vm/compiler/codegen/arm/Thumb/Gen.c b/vm/compiler/codegen/arm/Thumb/Gen.c
index 046a7025b..07f3f092f 100644
--- a/vm/compiler/codegen/arm/Thumb/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb/Gen.c
@@ -120,14 +120,8 @@ void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
dvmCompilerNew(numTemps * sizeof(*pool->coreTemps), true);
pool->numFPTemps = 0;
pool->FPTemps = NULL;
- pool->numCoreRegs = 0;
- pool->coreRegs = NULL;
- pool->numFPRegs = 0;
- pool->FPRegs = NULL;
dvmCompilerInitPool(pool->coreTemps, coreTemps, pool->numCoreTemps);
dvmCompilerInitPool(pool->FPTemps, NULL, 0);
- dvmCompilerInitPool(pool->coreRegs, NULL, 0);
- dvmCompilerInitPool(pool->FPRegs, NULL, 0);
pool->nullCheckedRegs =
dvmCompilerAllocBitVector(cUnit->numSSARegs, false);
}
diff --git a/vm/compiler/codegen/arm/Thumb2/Gen.c b/vm/compiler/codegen/arm/Thumb2/Gen.c
index 8d12d7767..0891524f7 100644
--- a/vm/compiler/codegen/arm/Thumb2/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb2/Gen.c
@@ -97,14 +97,8 @@ void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
pool->numFPTemps = numFPTemps;
pool->FPTemps = (RegisterInfo *)
dvmCompilerNew(numFPTemps * sizeof(*cUnit->regPool->FPTemps), true);
- pool->numCoreRegs = 0;
- pool->coreRegs = NULL;
- pool->numFPRegs = 0;
- pool->FPRegs = NULL;
dvmCompilerInitPool(pool->coreTemps, coreTemps, pool->numCoreTemps);
dvmCompilerInitPool(pool->FPTemps, fpTemps, pool->numFPTemps);
- dvmCompilerInitPool(pool->coreRegs, NULL, 0);
- dvmCompilerInitPool(pool->FPRegs, NULL, 0);
pool->nullCheckedRegs =
dvmCompilerAllocBitVector(cUnit->numSSARegs, false);
}