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-rw-r--r--vm/Globals.h3
-rw-r--r--vm/compiler/Compiler.c2
-rw-r--r--vm/compiler/Compiler.h1
-rw-r--r--vm/compiler/codegen/arm/Assemble.c4
-rw-r--r--vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c1
-rw-r--r--vm/compiler/codegen/arm/armv5te/ArchVariant.c1
-rw-r--r--vm/compiler/codegen/arm/armv7-a/ArchVariant.c2
-rw-r--r--vm/interp/Jit.h3
-rw-r--r--vm/mterp/armv5te/footer.S8
-rw-r--r--vm/mterp/armv5te/header.S3
-rw-r--r--vm/mterp/common/jit-config.h23
-rw-r--r--vm/mterp/out/InterpAsm-armv4t.S11
-rw-r--r--vm/mterp/out/InterpAsm-armv5te-vfp.S11
-rw-r--r--vm/mterp/out/InterpAsm-armv5te.S11
-rw-r--r--vm/mterp/out/InterpAsm-armv7-a.S11
15 files changed, 68 insertions, 27 deletions
diff --git a/vm/Globals.h b/vm/Globals.h
index 5e332dd79..81bcefca5 100644
--- a/vm/Globals.h
+++ b/vm/Globals.h
@@ -699,6 +699,9 @@ struct DvmJitGlobals {
/* How many entries in the JitEntryTable are in use */
unsigned int jitTableEntriesUsed;
+ /* Bytes allocated for the code cache */
+ unsigned int codeCacheSize;
+
/* Trigger for trace selection */
unsigned short threshold;
diff --git a/vm/compiler/Compiler.c b/vm/compiler/Compiler.c
index d23a52fdf..705333b85 100644
--- a/vm/compiler/Compiler.c
+++ b/vm/compiler/Compiler.c
@@ -126,7 +126,7 @@ bool dvmCompilerSetupCodeCache(void)
extern void dmvCompilerTemplateEnd(void);
/* Allocate the code cache */
- gDvmJit.codeCache = mmap(0, CODE_CACHE_SIZE,
+ gDvmJit.codeCache = mmap(0, gDvmJit.codeCacheSize,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_PRIVATE | MAP_ANON, -1, 0);
if (gDvmJit.codeCache == MAP_FAILED) {
diff --git a/vm/compiler/Compiler.h b/vm/compiler/Compiler.h
index 153e84568..ccc91ddb2 100644
--- a/vm/compiler/Compiler.h
+++ b/vm/compiler/Compiler.h
@@ -19,7 +19,6 @@
#ifndef _DALVIK_VM_COMPILER
#define _DALVIK_VM_COMPILER
-#define CODE_CACHE_SIZE 1024*1024
#define MAX_JIT_RUN_LEN 64
#define COMPILER_WORK_QUEUE_SIZE 100
#define COMPILER_IC_PATCH_QUEUE_SIZE 64
diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.c
index 5cb8ff697..f854b7ad3 100644
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.c
@@ -1216,7 +1216,7 @@ void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info)
cUnit->totalSize = offset;
- if (gDvmJit.codeCacheByteUsed + cUnit->totalSize > CODE_CACHE_SIZE) {
+ if (gDvmJit.codeCacheByteUsed + cUnit->totalSize > gDvmJit.codeCacheSize) {
gDvmJit.codeCacheFull = true;
cUnit->baseAddr = NULL;
return;
@@ -1504,7 +1504,7 @@ void dvmCompilerPatchInlineCache(void)
/* Initialize the min/max address range */
minAddr = (PredictedChainingCell *)
- ((char *) gDvmJit.codeCache + CODE_CACHE_SIZE);
+ ((char *) gDvmJit.codeCache + gDvmJit.codeCacheSize);
maxAddr = (PredictedChainingCell *) gDvmJit.codeCache;
for (i = 0; i < gDvmJit.compilerICPatchIndex; i++) {
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
index 9a602f69b..b5706f530 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
@@ -52,6 +52,7 @@ bool dvmCompilerArchVariantInit(void)
gDvmJit.jitTableSize = 1 << 9; // 512
gDvmJit.jitTableMask = gDvmJit.jitTableSize - 1;
gDvmJit.threshold = 200;
+ gDvmJit.codeCacheSize = 512*1024;
#if defined(WITH_SELF_VERIFICATION)
/* Force into blocking mode */
diff --git a/vm/compiler/codegen/arm/armv5te/ArchVariant.c b/vm/compiler/codegen/arm/armv5te/ArchVariant.c
index 2d080e44d..1311510ed 100644
--- a/vm/compiler/codegen/arm/armv5te/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te/ArchVariant.c
@@ -52,6 +52,7 @@ bool dvmCompilerArchVariantInit(void)
gDvmJit.jitTableSize = 1 << 9; // 512
gDvmJit.jitTableMask = gDvmJit.jitTableSize - 1;
gDvmJit.threshold = 200;
+ gDvmJit.codeCacheSize = 512*1024;
#if defined(WITH_SELF_VERIFICATION)
/* Force into blocking mode */
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
index cd8754c3c..1579d122d 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
@@ -14,7 +14,6 @@
* limitations under the License.
*/
-
/*
* Determine the initial instruction set to be used for this trace.
* Later components may decide to change this.
@@ -48,6 +47,7 @@ bool dvmCompilerArchVariantInit(void)
gDvmJit.jitTableSize = 1 << 12; // 4096
gDvmJit.jitTableMask = gDvmJit.jitTableSize - 1;
gDvmJit.threshold = 40;
+ gDvmJit.codeCacheSize = 1024*1024;
#if defined(WITH_SELF_VERIFICATION)
/* Force into blocking */
diff --git a/vm/interp/Jit.h b/vm/interp/Jit.h
index 273b35f53..eb4c95d70 100644
--- a/vm/interp/Jit.h
+++ b/vm/interp/Jit.h
@@ -20,8 +20,7 @@
#define _DALVIK_INTERP_JIT
#include "InterpDefs.h"
-
-#define JIT_PROF_SIZE 2048
+#include "mterp/common/jit-config.h"
#define JIT_MAX_TRACE_LEN 100
diff --git a/vm/mterp/armv5te/footer.S b/vm/mterp/armv5te/footer.S
index 240b603c5..1e6cec3b0 100644
--- a/vm/mterp/armv5te/footer.S
+++ b/vm/mterp/armv5te/footer.S
@@ -206,11 +206,11 @@ common_testUpdateProfile:
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
- lsl r3,r3,#21 @ shift out excess 2047
- ldrb r1,[r0,r3,lsr #21] @ get counter
+ lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
+ ldrb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ get counter
GET_INST_OPCODE(ip)
subs r1,r1,#1 @ decrement counter
- strb r1,[r0,r3,lsr #21] @ and store it
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
/*
@@ -221,7 +221,7 @@ common_updateProfile:
*/
GET_JIT_THRESHOLD(r1)
ldr r10, [rGLUE, #offGlue_self] @ callee saved r10 <- glue->self
- strb r1,[r0,r3,lsr #21] @ reset counter
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
bl dvmJitGetCodeAddr @ r0<- dvmJitGetCodeAddr(rPC)
diff --git a/vm/mterp/armv5te/header.S b/vm/mterp/armv5te/header.S
index d3fd16723..b6e98914a 100644
--- a/vm/mterp/armv5te/header.S
+++ b/vm/mterp/armv5te/header.S
@@ -194,3 +194,6 @@ unspecified registers or condition codes.
*/
#include "../common/asm-constants.h"
+#if defined(WITH_JIT)
+#include "../common/jit-config.h"
+#endif
diff --git a/vm/mterp/common/jit-config.h b/vm/mterp/common/jit-config.h
new file mode 100644
index 000000000..8cc32e3ca
--- /dev/null
+++ b/vm/mterp/common/jit-config.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2010 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if __ARM_ARCH_5TE__
+#define JIT_PROF_SIZE_LOG_2 9
+#else
+#define JIT_PROF_SIZE_LOG_2 11
+#endif
+
+#define JIT_PROF_SIZE (1 << JIT_PROF_SIZE_LOG_2)
diff --git a/vm/mterp/out/InterpAsm-armv4t.S b/vm/mterp/out/InterpAsm-armv4t.S
index a7aeaef31..b24c9172e 100644
--- a/vm/mterp/out/InterpAsm-armv4t.S
+++ b/vm/mterp/out/InterpAsm-armv4t.S
@@ -201,6 +201,9 @@ unspecified registers or condition codes.
*/
#include "../common/asm-constants.h"
+#if defined(WITH_JIT)
+#include "../common/jit-config.h"
+#endif
/* File: armv5te/platform.S */
/*
@@ -9733,11 +9736,11 @@ common_testUpdateProfile:
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
- lsl r3,r3,#21 @ shift out excess 2047
- ldrb r1,[r0,r3,lsr #21] @ get counter
+ lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
+ ldrb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ get counter
GET_INST_OPCODE(ip)
subs r1,r1,#1 @ decrement counter
- strb r1,[r0,r3,lsr #21] @ and store it
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
/*
@@ -9748,7 +9751,7 @@ common_updateProfile:
*/
GET_JIT_THRESHOLD(r1)
ldr r10, [rGLUE, #offGlue_self] @ callee saved r10 <- glue->self
- strb r1,[r0,r3,lsr #21] @ reset counter
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
bl dvmJitGetCodeAddr @ r0<- dvmJitGetCodeAddr(rPC)
diff --git a/vm/mterp/out/InterpAsm-armv5te-vfp.S b/vm/mterp/out/InterpAsm-armv5te-vfp.S
index 52f426303..01e4f07f9 100644
--- a/vm/mterp/out/InterpAsm-armv5te-vfp.S
+++ b/vm/mterp/out/InterpAsm-armv5te-vfp.S
@@ -201,6 +201,9 @@ unspecified registers or condition codes.
*/
#include "../common/asm-constants.h"
+#if defined(WITH_JIT)
+#include "../common/jit-config.h"
+#endif
/* File: armv5te/platform.S */
/*
@@ -9251,11 +9254,11 @@ common_testUpdateProfile:
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
- lsl r3,r3,#21 @ shift out excess 2047
- ldrb r1,[r0,r3,lsr #21] @ get counter
+ lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
+ ldrb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ get counter
GET_INST_OPCODE(ip)
subs r1,r1,#1 @ decrement counter
- strb r1,[r0,r3,lsr #21] @ and store it
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
/*
@@ -9266,7 +9269,7 @@ common_updateProfile:
*/
GET_JIT_THRESHOLD(r1)
ldr r10, [rGLUE, #offGlue_self] @ callee saved r10 <- glue->self
- strb r1,[r0,r3,lsr #21] @ reset counter
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
bl dvmJitGetCodeAddr @ r0<- dvmJitGetCodeAddr(rPC)
diff --git a/vm/mterp/out/InterpAsm-armv5te.S b/vm/mterp/out/InterpAsm-armv5te.S
index 822491ab9..7e9786115 100644
--- a/vm/mterp/out/InterpAsm-armv5te.S
+++ b/vm/mterp/out/InterpAsm-armv5te.S
@@ -201,6 +201,9 @@ unspecified registers or condition codes.
*/
#include "../common/asm-constants.h"
+#if defined(WITH_JIT)
+#include "../common/jit-config.h"
+#endif
/* File: armv5te/platform.S */
/*
@@ -9727,11 +9730,11 @@ common_testUpdateProfile:
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
- lsl r3,r3,#21 @ shift out excess 2047
- ldrb r1,[r0,r3,lsr #21] @ get counter
+ lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
+ ldrb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ get counter
GET_INST_OPCODE(ip)
subs r1,r1,#1 @ decrement counter
- strb r1,[r0,r3,lsr #21] @ and store it
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
/*
@@ -9742,7 +9745,7 @@ common_updateProfile:
*/
GET_JIT_THRESHOLD(r1)
ldr r10, [rGLUE, #offGlue_self] @ callee saved r10 <- glue->self
- strb r1,[r0,r3,lsr #21] @ reset counter
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
bl dvmJitGetCodeAddr @ r0<- dvmJitGetCodeAddr(rPC)
diff --git a/vm/mterp/out/InterpAsm-armv7-a.S b/vm/mterp/out/InterpAsm-armv7-a.S
index c00d316d1..5ac1bd0e8 100644
--- a/vm/mterp/out/InterpAsm-armv7-a.S
+++ b/vm/mterp/out/InterpAsm-armv7-a.S
@@ -201,6 +201,9 @@ unspecified registers or condition codes.
*/
#include "../common/asm-constants.h"
+#if defined(WITH_JIT)
+#include "../common/jit-config.h"
+#endif
/* File: armv5te/platform.S */
/*
@@ -9187,11 +9190,11 @@ common_testUpdateProfile:
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
- lsl r3,r3,#21 @ shift out excess 2047
- ldrb r1,[r0,r3,lsr #21] @ get counter
+ lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
+ ldrb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ get counter
GET_INST_OPCODE(ip)
subs r1,r1,#1 @ decrement counter
- strb r1,[r0,r3,lsr #21] @ and store it
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
/*
@@ -9202,7 +9205,7 @@ common_updateProfile:
*/
GET_JIT_THRESHOLD(r1)
ldr r10, [rGLUE, #offGlue_self] @ callee saved r10 <- glue->self
- strb r1,[r0,r3,lsr #21] @ reset counter
+ strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
bl dvmJitGetCodeAddr @ r0<- dvmJitGetCodeAddr(rPC)
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-11 01:49:07 +0000