Clean up warnings detected by gcc.

Also re-enabled the JIT for the ARMv5te target.

Change-Id: I89fd229205e30e6ee92a4933290a7d8dca001232

11 files changed, 29 insertions, 7 deletions

diff --git a/vm/compiler/codegen/arm/CalloutHelper.h b/vm/compiler/codegen/arm/CalloutHelper.h
index f6d5f4efc..d6eb421c9 100644
--- a/vm/compiler/codegen/arm/CalloutHelper.h
+++ b/vm/compiler/codegen/arm/CalloutHelper.h
@@ -80,9 +80,12 @@ ArrayObject* dvmAllocArrayByClass(ClassObject* arrayClass, // OP_NEW_ARRAY
 bool dvmInterpHandleFillArrayData(ArrayObject* arrayObject,// OP_FILL_ARRAY_DATA
                                   const u2* arrayData);
 
-/* Switch dispatch offset calculation for OP_PACKED_SWITCH & OP_SPARSE_SWITCH */
-static s8 findPackedSwitchIndex(const u2* switchData, int testVal, int pc);
-static s8 findSparseSwitchIndex(const u2* switchData, int testVal, int pc);
+/*
+ * Switch dispatch offset calculation for OP_PACKED_SWITCH & OP_SPARSE_SWITCH
+ * Used in CodegenDriver.c
+ * static s8 findPackedSwitchIndex(const u2* switchData, int testVal, int pc);
+ * static s8 findSparseSwitchIndex(const u2* switchData, int testVal, int pc);
+ */
 
 /*
  * Resolve interface callsites - OP_INVOKE_INTERFACE & OP_INVOKE_INTERFACE_RANGE
diff --git a/vm/compiler/codegen/arm/Codegen.h b/vm/compiler/codegen/arm/Codegen.h
index da65bb5d3..ca0a843be 100644
--- a/vm/compiler/codegen/arm/Codegen.h
+++ b/vm/compiler/codegen/arm/Codegen.h
@@ -25,6 +25,7 @@
 #include "compiler/CompilerIR.h"
 #include "CalloutHelper.h"
 
+#if defined(_CODEGEN_C)
 /*
  * loadConstant() sometimes needs to add a small imm to a pre-existing constant
  */
@@ -44,10 +45,16 @@ static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
 
 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
 
+#if defined(WITH_DEADLOCK_PREDICTION) || defined(WITH_MONITOR_TRACKING) || \
+    defined(__ARM_ARCH_5__)
 static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir);
+#endif
 
 static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir);
 
+#endif
+
+
 #if defined(WITH_SELF_VERIFICATION)
 /* Self Verification memory instruction decoder */
 void dvmSelfVerificationMemOpDecode(int lr, int* sp);
diff --git a/vm/compiler/codegen/arm/CodegenCommon.c b/vm/compiler/codegen/arm/CodegenCommon.c
index 0cec99df8..d8854ba4f 100644
--- a/vm/compiler/codegen/arm/CodegenCommon.c
+++ b/vm/compiler/codegen/arm/CodegenCommon.c
@@ -256,6 +256,7 @@ static ArmLIR *newLIR3(CompilationUnit *cUnit, ArmOpCode opCode,
     return insn;
 }
 
+#if defined(_ARMV7_A) || defined(_ARMV7_A_NEON)
 static ArmLIR *newLIR4(CompilationUnit *cUnit, ArmOpCode opCode,
                            int dest, int src1, int src2, int info)
 {
@@ -271,6 +272,7 @@ static ArmLIR *newLIR4(CompilationUnit *cUnit, ArmOpCode opCode,
     dvmCompilerAppendLIR(cUnit, (LIR *) insn);
     return insn;
 }
+#endif
 
 /*
  * If the next instruction is a move-result or move-result-long,
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index f625771ec..dbb85c9b2 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1214,6 +1214,8 @@ static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir)
     opReg(cUnit, kOpBlx, r2);
 }
 
+#if defined(WITH_DEADLOCK_PREDICTION) || defined(WITH_MONITOR_TRACKING) || \
+    defined(_ARMV5TE) || defined(_ARMV5TE_VFP)
 /*
  * To prevent a thread in a monitor wait from blocking the Jit from
  * resetting the code cache, heavyweight monitor lock will not
@@ -1259,6 +1261,7 @@ static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir)
         dvmCompilerClobberCallRegs(cUnit);
     }
 }
+#endif
 
 /*
  * The following are the first-level codegen routines that analyze the format
diff --git a/vm/compiler/codegen/arm/LocalOptimizations.c b/vm/compiler/codegen/arm/LocalOptimizations.c
index 729486cdc..724fdb7ad 100644
--- a/vm/compiler/codegen/arm/LocalOptimizations.c
+++ b/vm/compiler/codegen/arm/LocalOptimizations.c
@@ -50,6 +50,8 @@ static inline bool isDalvikRegisterClobbered(ArmLIR *lir1, ArmLIR *lir2)
   return (reg1Lo == reg2Lo) || (reg1Lo == reg2Hi) || (reg1Hi == reg2Lo);
 }
 
+#if 0
+/* Debugging utility routine */
 static void dumpDependentInsnPair(ArmLIR *thisLIR, ArmLIR *checkLIR,
                                   const char *optimization)
 {
@@ -57,6 +59,7 @@ static void dumpDependentInsnPair(ArmLIR *thisLIR, ArmLIR *checkLIR,
     dvmDumpLIRInsn((LIR *) thisLIR, 0);
     dvmDumpLIRInsn((LIR *) checkLIR, 0);
 }
+#endif
 
 /*
  * Perform a pass of top-down walk to
diff --git a/vm/compiler/codegen/arm/Thumb/Factory.c b/vm/compiler/codegen/arm/Thumb/Factory.c
index 4c010c619..85f612ec0 100644
--- a/vm/compiler/codegen/arm/Thumb/Factory.c
+++ b/vm/compiler/codegen/arm/Thumb/Factory.c
@@ -23,7 +23,6 @@
  */
 
 static int coreTemps[] = {r0, r1, r2, r3, r4PC, r7};
-static int corePreserved[] = {};
 
 static void storePair(CompilationUnit *cUnit, int base, int lowReg,
                       int highReg);
@@ -569,7 +568,6 @@ static ArmLIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase,
     ArmLIR *load2 = NULL;
     ArmOpCode opCode = kThumbBkpt;
     bool shortForm = false;
-    int shortMax = 128;
     int encodedDisp = displacement;
     bool pair = false;
 
@@ -700,7 +698,6 @@ static ArmLIR *storeBaseDispBody(CompilationUnit *cUnit, int rBase,
     ArmLIR *store2 = NULL;
     ArmOpCode opCode = kThumbBkpt;
     bool shortForm = false;
-    int shortMax = 128;
     int encodedDisp = displacement;
     bool pair = false;
 
diff --git a/vm/compiler/codegen/arm/Thumb/Gen.c b/vm/compiler/codegen/arm/Thumb/Gen.c
index e01479505..37cc18d97 100644
--- a/vm/compiler/codegen/arm/Thumb/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb/Gen.c
@@ -112,7 +112,6 @@ static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
 
 void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
 {
-    int i;
     int numTemps = sizeof(coreTemps)/sizeof(int);
     RegisterPool *pool = dvmCompilerNew(sizeof(*pool), true);
     cUnit->regPool = pool;
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c b/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c
index 04bb3a2b7..3b0390185 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c
@@ -13,6 +13,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+#define _CODEGEN_C
+#define _ARMV5TE_VFP
 
 #include "Dalvik.h"
 #include "interp/InterpDefs.h"
diff --git a/vm/compiler/codegen/arm/armv5te/Codegen.c b/vm/compiler/codegen/arm/armv5te/Codegen.c
index 5e53ae4e4..1d9ee6d90 100644
--- a/vm/compiler/codegen/arm/armv5te/Codegen.c
+++ b/vm/compiler/codegen/arm/armv5te/Codegen.c
@@ -13,6 +13,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+#define _CODEGEN_C
+#define _ARMV5TE
 
 #include "Dalvik.h"
 #include "interp/InterpDefs.h"
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c b/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c
index baa96323a..305d10384 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c
@@ -13,6 +13,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+#define _CODEGEN_C
+#define _ARMV7_A_NEON
 
 #include "Dalvik.h"
 #include "interp/InterpDefs.h"
diff --git a/vm/compiler/codegen/arm/armv7-a/Codegen.c b/vm/compiler/codegen/arm/armv7-a/Codegen.c
index baa96323a..0f646947f 100644
--- a/vm/compiler/codegen/arm/armv7-a/Codegen.c
+++ b/vm/compiler/codegen/arm/armv7-a/Codegen.c
@@ -13,6 +13,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+#define _CODEGEN_C
+#define _ARMV7_A
 
 #include "Dalvik.h"
 #include "interp/InterpDefs.h"