diff options
author | Carl Shapiro <cshapiro@google.com> | 2011-04-19 17:34:24 -0700 |
---|---|---|
committer | Carl Shapiro <cshapiro@google.com> | 2011-04-19 17:34:24 -0700 |
commit | 5d5b94c8d14b166af580d5dd5906db4f9527d6ca (patch) | |
tree | 3316231983154784835b1d8b056e233727ee42c5 /vm/compiler/codegen/x86/Assemble.cpp | |
parent | 6f430bb050987ca4e0be70e9c6aea5a11b4a7f84 (diff) | |
download | android_dalvik-5d5b94c8d14b166af580d5dd5906db4f9527d6ca.tar.gz android_dalvik-5d5b94c8d14b166af580d5dd5906db4f9527d6ca.tar.bz2 android_dalvik-5d5b94c8d14b166af580d5dd5906db4f9527d6ca.zip |
Move the compiler into C++.
Change-Id: Idffbdb02c29e2be03a75f5a0a664603f2299504a
Diffstat (limited to 'vm/compiler/codegen/x86/Assemble.cpp')
-rw-r--r-- | vm/compiler/codegen/x86/Assemble.cpp | 148 |
1 files changed, 148 insertions, 0 deletions
diff --git a/vm/compiler/codegen/x86/Assemble.cpp b/vm/compiler/codegen/x86/Assemble.cpp new file mode 100644 index 000000000..03edbf109 --- /dev/null +++ b/vm/compiler/codegen/x86/Assemble.cpp @@ -0,0 +1,148 @@ +/* + * Copyright (C) 2010 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "Dalvik.h" +#include "libdex/DexOpcodes.h" + +#include "../../CompilerInternals.h" +#include "X86LIR.h" +#include "Codegen.h" +#include <sys/mman.h> /* for protection change */ + +#define MAX_ASSEMBLER_RETRIES 10 + + +/* Track the number of times that the code cache is patched */ +#if defined(WITH_JIT_TUNING) +#define UPDATE_CODE_CACHE_PATCHES() (gDvmJit.codeCachePatches++) +#else +#define UPDATE_CODE_CACHE_PATCHES() +#endif + +/* + * Translation layout in the code cache. Note that the codeAddress pointer + * in JitTable will point directly to the code body (field codeAddress). The + * chain cell offset codeAddress - 2, and (if present) executionCount is at + * codeAddress - 6. + * + * +----------------------------+ + * | Execution count | -> [Optional] 4 bytes + * +----------------------------+ + * +--| Offset to chain cell counts| -> 2 bytes + * | +----------------------------+ + * | | Code body | -> Start address for translation + * | | | variable in 2-byte chunks + * | . . (JitTable's codeAddress points here) + * | . . + * | | | + * | +----------------------------+ + * | | Chaining Cells | -> 16 bytes each, 8 byte aligned + * | . . + * | . . + * | | | + * | +----------------------------+ + * | | Gap for large switch stmt | -> # cases >= MAX_CHAINED_SWITCH_CASES + * | +----------------------------+ + * +->| Chaining cell counts | -> 8 bytes, chain cell counts by type + * +----------------------------+ + * | Trace description | -> variable sized + * . . + * | | + * +----------------------------+ + * | Literal pool | -> 4-byte aligned, variable size + * . . Note: for x86 literals will + * . . generally appear inline. + * | | + * +----------------------------+ + * + * Go over each instruction in the list and calculate the offset from the top + * before sending them off to the assembler. If out-of-range branch distance is + * seen rearrange the instructions a bit to correct it. + */ +void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info) +{ +} + +/* + * Perform translation chain operation. + */ +void* dvmJitChain(void* tgtAddr, u4* branchAddr) +{ + return 0; +} + +/* + * This method is called from the invoke templates for virtual and interface + * methods to speculatively setup a chain to the callee. The templates are + * written in assembly and have setup method, cell, and clazz at r0, r2, and + * r3 respectively, so there is a unused argument in the list. Upon return one + * of the following three results may happen: + * 1) Chain is not setup because the callee is native. Reset the rechain + * count to a big number so that it will take a long time before the next + * rechain attempt to happen. + * 2) Chain is not setup because the callee has not been created yet. Reset + * the rechain count to a small number and retry in the near future. + * 3) Enqueue the new content for the chaining cell which will be appled in + * next safe point. + */ +const Method *dvmJitToPatchPredictedChain(const Method *method, + Thread *self, + PredictedChainingCell *cell, + const ClassObject *clazz) +{ + return 0; +} + +/* + * Patch the inline cache content based on the content passed from the work + * order. + */ +void dvmCompilerPatchInlineCache(void) +{ +} + +/* + * Unchain a trace given the starting address of the translation + * in the code cache. Refer to the diagram in dvmCompilerAssembleLIR. + * Returns the address following the last cell unchained. Note that + * the incoming codeAddr is a thumb code address, and therefore has + * the low bit set. + */ +u4* dvmJitUnchain(void* codeAddr) +{ + return 0; +} + +/* Unchain all translation in the cache. */ +void dvmJitUnchainAll() +{ +} + +/* Create a copy of the trace descriptor of an existing compilation */ +JitTraceDescription *dvmCopyTraceDescriptor(const u2 *pc, + const JitEntry *knownEntry) +{ + return 0; +} + +/* Sort the trace profile counts and dump them */ +void dvmCompilerSortAndPrintTraceProfiles() +{ +} + +void dvmJitScanAllClassPointers(void (*callback)(void *)) +{ +} |