Merge "Fix the MIPS build: 1. LOG->ALOG conversion 2. Remove Jumbo opcodes support"

9 files changed, 142 insertions, 230 deletions

diff --git a/vm/compiler/codegen/mips/ArchUtility.cpp b/vm/compiler/codegen/mips/ArchUtility.cpp
index 869632ea5..1f6d59376 100644
--- a/vm/compiler/codegen/mips/ArchUtility.cpp
+++ b/vm/compiler/codegen/mips/ArchUtility.cpp
@@ -204,7 +204,7 @@ void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix)
         }
     }
     if (buf[0]) {
-        LOGD("%s: %s", prefix, buf);
+        ALOGD("%s: %s", prefix, buf);
     }
 }
 
@@ -227,68 +227,68 @@ void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
     /* Handle pseudo-ops individually, and all regular insns as a group */
     switch(lir->opcode) {
         case kMipsChainingCellBottom:
-            LOGD("-------- end of chaining cells (0x%04x)", offset);
+            ALOGD("-------- end of chaining cells (0x%04x)", offset);
             break;
         case kMipsPseudoBarrier:
-            LOGD("-------- BARRIER");
+            ALOGD("-------- BARRIER");
             break;
         case kMipsPseudoExtended:
             /* intentional fallthrough */
         case kMipsPseudoSSARep:
-            DUMP_SSA_REP(LOGD("-------- %s", (char *) dest));
+            DUMP_SSA_REP(ALOGD("-------- %s", (char *) dest));
             break;
         case kMipsPseudoChainingCellBackwardBranch:
-            LOGD("L%p:", lir);
-            LOGD("-------- chaining cell (backward branch): 0x%04x", dest);
+            ALOGD("L%p:", lir);
+            ALOGD("-------- chaining cell (backward branch): 0x%04x", dest);
             break;
         case kMipsPseudoChainingCellNormal:
-            LOGD("L%p:", lir);
-            LOGD("-------- chaining cell (normal): 0x%04x", dest);
+            ALOGD("L%p:", lir);
+            ALOGD("-------- chaining cell (normal): 0x%04x", dest);
             break;
         case kMipsPseudoChainingCellHot:
-            LOGD("L%p:", lir);
-            LOGD("-------- chaining cell (hot): 0x%04x", dest);
+            ALOGD("L%p:", lir);
+            ALOGD("-------- chaining cell (hot): 0x%04x", dest);
             break;
         case kMipsPseudoChainingCellInvokePredicted:
-            LOGD("L%p:", lir);
-            LOGD("-------- chaining cell (predicted): %s%s",
+            ALOGD("L%p:", lir);
+            ALOGD("-------- chaining cell (predicted): %s%s",
                  dest ? ((Method *) dest)->clazz->descriptor : "",
                  dest ? ((Method *) dest)->name : "N/A");
             break;
         case kMipsPseudoChainingCellInvokeSingleton:
-            LOGD("L%p:", lir);
-            LOGD("-------- chaining cell (invoke singleton): %s%s/%p",
+            ALOGD("L%p:", lir);
+            ALOGD("-------- chaining cell (invoke singleton): %s%s/%p",
                  ((Method *)dest)->clazz->descriptor,
                  ((Method *)dest)->name,
                  ((Method *)dest)->insns);
             break;
         case kMipsPseudoEntryBlock:
-            LOGD("-------- entry offset: 0x%04x", dest);
+            ALOGD("-------- entry offset: 0x%04x", dest);
             break;
         case kMipsPseudoDalvikByteCodeBoundary:
-            LOGD("-------- dalvik offset: 0x%04x @ %s", dest,
+            ALOGD("-------- dalvik offset: 0x%04x @ %s", dest,
                  (char *) lir->operands[1]);
             break;
         case kMipsPseudoExitBlock:
-            LOGD("-------- exit offset: 0x%04x", dest);
+            ALOGD("-------- exit offset: 0x%04x", dest);
             break;
         case kMipsPseudoPseudoAlign4:
-            LOGD("%p (%04x): .align4", baseAddr + offset, offset);
+            ALOGD("%p (%04x): .align4", baseAddr + offset, offset);
             break;
         case kMipsPseudoPCReconstructionCell:
-            LOGD("L%p:", lir);
-            LOGD("-------- reconstruct dalvik PC : 0x%04x @ +0x%04x", dest,
+            ALOGD("L%p:", lir);
+            ALOGD("-------- reconstruct dalvik PC : 0x%04x @ +0x%04x", dest,
                  lir->operands[1]);
             break;
         case kMipsPseudoPCReconstructionBlockLabel:
             /* Do nothing */
             break;
         case kMipsPseudoEHBlockLabel:
-            LOGD("Exception_Handling:");
+            ALOGD("Exception_Handling:");
             break;
         case kMipsPseudoTargetLabel:
         case kMipsPseudoNormalBlockLabel:
-            LOGD("L%p:", lir);
+            ALOGD("L%p:", lir);
             break;
         default:
             if (lir->flags.isNop && !dumpNop) {
@@ -298,7 +298,7 @@ void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
                             baseAddr, 256);
             buildInsnString(EncodingMap[lir->opcode].fmt, lir, buf, baseAddr,
                             256);
-            LOGD("%p (%04x): %08x %-9s%s%s",
+            ALOGD("%p (%04x): %08x %-9s%s%s",
                  baseAddr + offset, offset, *(u4 *)(baseAddr + offset), opName, buf,
                  lir->flags.isNop ? "(nop)" : "");
             break;
@@ -317,25 +317,25 @@ void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
 /* Dump instructions and constant pool contents */
 void dvmCompilerCodegenDump(CompilationUnit *cUnit)
 {
-    LOGD("Dumping LIR insns");
+    ALOGD("Dumping LIR insns");
     LIR *lirInsn;
     MipsLIR *mipsLIR;
 
-    LOGD("installed code is at %p", cUnit->baseAddr);
-    LOGD("total size is %d bytes", cUnit->totalSize);
+    ALOGD("installed code is at %p", cUnit->baseAddr);
+    ALOGD("total size is %d bytes", cUnit->totalSize);
     for (lirInsn = cUnit->firstLIRInsn; lirInsn; lirInsn = lirInsn->next) {
         dvmDumpLIRInsn(lirInsn, (unsigned char *) cUnit->baseAddr);
     }
     for (lirInsn = cUnit->classPointerList; lirInsn; lirInsn = lirInsn->next) {
         mipsLIR = (MipsLIR *) lirInsn;
-        LOGD("%p (%04x): .class (%s)",
+        ALOGD("%p (%04x): .class (%s)",
              (char*)cUnit->baseAddr + mipsLIR->generic.offset,
              mipsLIR->generic.offset,
              ((CallsiteInfo *) mipsLIR->operands[0])->classDescriptor);
     }
     for (lirInsn = cUnit->literalList; lirInsn; lirInsn = lirInsn->next) {
         mipsLIR = (MipsLIR *) lirInsn;
-        LOGD("%p (%04x): .word (%#x)",
+        ALOGD("%p (%04x): .word (%#x)",
              (char*)cUnit->baseAddr + mipsLIR->generic.offset,
              mipsLIR->generic.offset,
              mipsLIR->operands[0]);
diff --git a/vm/compiler/codegen/mips/Assemble.cpp b/vm/compiler/codegen/mips/Assemble.cpp
index 692fccfc5..713bced68 100644
--- a/vm/compiler/codegen/mips/Assemble.cpp
+++ b/vm/compiler/codegen/mips/Assemble.cpp
@@ -455,11 +455,11 @@ static AssemblerStatus assembleInstructions(CompilationUnit *cUnit,
             intptr_t target = targetLIR->generic.offset;
             int delta = target - pc;
             if (delta & 0x3) {
-                LOGE("PC-rel distance is not multiple of 4: %d", delta);
+                ALOGE("PC-rel distance is not multiple of 4: %d", delta);
                 dvmAbort();
             }
             if (delta > 131068 || delta < -131069) {
-                LOGE("Unconditional branch distance out of range: %d", delta);
+                ALOGE("Unconditional branch distance out of range: %d", delta);
                 dvmAbort();
             }
             lir->operands[0] = delta >> 2;
@@ -469,11 +469,11 @@ static AssemblerStatus assembleInstructions(CompilationUnit *cUnit,
             intptr_t target = targetLIR->generic.offset;
             int delta = target - pc;
             if (delta & 0x3) {
-                LOGE("PC-rel distance is not multiple of 4: %d", delta);
+                ALOGE("PC-rel distance is not multiple of 4: %d", delta);
                 dvmAbort();
             }
             if (delta > 131068 || delta < -131069) {
-                LOGE("Conditional branch distance out of range: %d", delta);
+                ALOGE("Conditional branch distance out of range: %d", delta);
                 dvmAbort();
             }
             lir->operands[1] = delta >> 2;
@@ -483,11 +483,11 @@ static AssemblerStatus assembleInstructions(CompilationUnit *cUnit,
             intptr_t target = targetLIR->generic.offset;
             int delta = target - pc;
             if (delta & 0x3) {
-                LOGE("PC-rel distance is not multiple of 4: %d", delta);
+                ALOGE("PC-rel distance is not multiple of 4: %d", delta);
                 dvmAbort();
             }
             if (delta > 131068 || delta < -131069) {
-                LOGE("Conditional branch distance out of range: %d", delta);
+                ALOGE("Conditional branch distance out of range: %d", delta);
                 dvmAbort();
             }
             lir->operands[2] = delta >> 2;
@@ -497,7 +497,7 @@ static AssemblerStatus assembleInstructions(CompilationUnit *cUnit,
             /* ensure PC-region branch can be used */
             assert((curPC & 0xF0000000) == (target & 0xF0000000));
             if (target & 0x3) {
-                LOGE("Jump target is not multiple of 4: %d", target);
+                ALOGE("Jump target is not multiple of 4: %d", target);
                 dvmAbort();
             }
             lir->operands[0] =  target >> 2;
@@ -721,7 +721,7 @@ static void matchSignatureBreakpoint(const CompilationUnit *cUnit,
                 }
             }
             if (j == gDvmJit.signatureBreakpointSize) {
-                LOGD("Signature match starting from offset %#x (%d words)",
+                ALOGD("Signature match starting from offset %#x (%d words)",
                      i*4, gDvmJit.signatureBreakpointSize);
                 int descSize = getTraceDescriptionSize(cUnit->traceDesc);
                 JitTraceDescription *newCopy =
@@ -816,7 +816,7 @@ void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info)
     /* Allocate enough space for the code block */
     cUnit->codeBuffer = (unsigned char *)dvmCompilerNew(chainCellOffset, true);
     if (cUnit->codeBuffer == NULL) {
-        LOGE("Code buffer allocation failure");
+        ALOGE("Code buffer allocation failure");
         info->discardResult = true;
         return;
     }
@@ -846,7 +846,7 @@ void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info)
         case kRetryHalve:
             return;
         default:
-             LOGE("Unexpected assembler status: %d", cUnit->assemblerStatus);
+             ALOGE("Unexpected assembler status: %d", cUnit->assemblerStatus);
              dvmAbort();
     }
 
@@ -961,7 +961,7 @@ void* dvmJitChain(void* tgtAddr, u4* branchAddr)
         gDvmJit.translationChains++;
 
         COMPILER_TRACE_CHAINING(
-            LOGD("Jit Runtime: chaining 0x%x to 0x%x",
+            ALOGD("Jit Runtime: chaining 0x%x to 0x%x",
                  (int) branchAddr, (int) tgtAddr & -2));
 
         newInst = assembleChainingBranch((int) tgtAddr & -2, 0);
@@ -1125,7 +1125,7 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
 
     if ((baseAddr & 0xF0000000) != (tgtAddr & 0xF0000000)) {
         COMPILER_TRACE_CHAINING(
-            LOGD("Jit Runtime: predicted chain %p to distant target %s ignored",
+            ALOGD("Jit Runtime: predicted chain %p to distant target %s ignored",
                  cell, method->name));
         goto done;
     }
@@ -1137,7 +1137,7 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
     if ((tgtAddr == 0) ||
         ((void*)tgtAddr == dvmCompilerGetInterpretTemplate())) {
         COMPILER_TRACE_CHAINING(
-            LOGD("Jit Runtime: predicted chain %p to method %s%s delayed",
+            ALOGD("Jit Runtime: predicted chain %p to method %s%s delayed",
                  cell, method->clazz->descriptor, method->name));
         goto done;
     }
@@ -1187,7 +1187,7 @@ void dvmCompilerPatchInlineCache(void)
 
     UNPROTECT_CODE_CACHE(gDvmJit.codeCache, gDvmJit.codeCacheByteUsed);
 
-    //LOGD("Number of IC patch work orders: %d", gDvmJit.compilerICPatchIndex);
+    //ALOGD("Number of IC patch work orders: %d", gDvmJit.compilerICPatchIndex);
 
     /* Initialize the min/max address range */
     minAddr = (PredictedChainingCell *)
@@ -1207,7 +1207,7 @@ void dvmCompilerPatchInlineCache(void)
         cellContent->clazz = clazz;
 
         COMPILER_TRACE_CHAINING(
-            LOGD("Jit Runtime: predicted chain %p from %s to %s (%s) "
+            ALOGD("Jit Runtime: predicted chain %p from %s to %s (%s) "
                  "patched",
                  cellAddr,
                  cellAddr->clazz->descriptor,
@@ -1297,11 +1297,11 @@ static u4* unchainSingle(JitEntry *trace)
 #endif
                 default:
                     targetOffset = 0; // make gcc happy
-                    LOGE("Unexpected chaining type: %d", i);
+                    ALOGE("Unexpected chaining type: %d", i);
                     dvmAbort();  // dvmAbort OK here - can't safely recover
             }
             COMPILER_TRACE_CHAINING(
-                LOGD("Jit Runtime: unchaining %#x", (int)pChainCells));
+                ALOGD("Jit Runtime: unchaining %#x", (int)pChainCells));
             /*
              * Code sequence for a chaining cell is:
              *     lw   a0, offset(rSELF)
@@ -1326,7 +1326,7 @@ void dvmJitUnchainAll()
     u4* highAddress = NULL;
     unsigned int i;
     if (gDvmJit.pJitEntryTable != NULL) {
-        COMPILER_TRACE_CHAINING(LOGD("Jit Runtime: unchaining all"));
+        COMPILER_TRACE_CHAINING(ALOGD("Jit Runtime: unchaining all"));
         dvmLockMutex(&gDvmJit.tableLock);
 
         UNPROTECT_CODE_CACHE(gDvmJit.codeCache, gDvmJit.codeCacheByteUsed);
@@ -1347,9 +1347,8 @@ void dvmJitUnchainAll()
             }
         }
 
-        if (lowAddress && highAddress) {
+        if (lowAddress && highAddress)
             dvmCompilerCacheFlush((long)lowAddress, (long)highAddress, 0);
-        }
 
         UPDATE_CODE_CACHE_PATCHES();
 
@@ -1387,12 +1386,12 @@ static int dumpTraceProfile(JitEntry *p, bool silent, bool reset,
 
     if (p->codeAddress == NULL) {
         if (!silent)
-            LOGD("TRACEPROFILE NULL");
+            ALOGD("TRACEPROFILE NULL");
         return 0;
     }
     if (p->codeAddress == dvmCompilerGetInterpretTemplate()) {
         if (!silent)
-            LOGD("TRACEPROFILE INTERPRET_ONLY");
+            ALOGD("TRACEPROFILE INTERPRET_ONLY");
         return 0;
     }
 
@@ -1422,7 +1421,7 @@ static int dumpTraceProfile(JitEntry *p, bool silent, bool reset,
                        method->accessFlags,
                        addrToLineCb, NULL, &addrToLine);
 
-    LOGD("TRACEPROFILE 0x%08x % 10d %5.2f%% [%#x(+%d), %d] %s%s;%s",
+    ALOGD("TRACEPROFILE 0x%08x % 10d %5.2f%% [%#x(+%d), %d] %s%s;%s",
          (int) getTraceBase(p),
          count,
          ((float ) count) / sum * 100.0,
@@ -1447,7 +1446,7 @@ static int dumpTraceProfile(JitEntry *p, bool silent, bool reset,
             desc->trace[idx+JIT_TRACE_CUR_METHOD-1].info.meta;
         char *methodDesc = dexProtoCopyMethodDescriptor(&method->prototype);
         /* Print the callee info in the trace */
-        LOGD("    -> %s%s;%s", method->clazz->descriptor, method->name,
+        ALOGD("    -> %s%s;%s", method->clazz->descriptor, method->name,
              methodDesc);
     }
 
@@ -1520,7 +1519,7 @@ void dvmCompilerSortAndPrintTraceProfiles()
         sum = 1;
     }
 
-    LOGD("JIT: Average execution count -> %d",(int)(sum / numTraces));
+    ALOGD("JIT: Average execution count -> %d",(int)(sum / numTraces));
 
     /* Dump the sorted entries. The count of each trace will be reset to 0. */
     for (i=0; i < gDvmJit.jitTableSize; i++) {
@@ -1795,12 +1794,12 @@ assert(0); /* MIPSTODO retarg func */
             data = *((u4*) addr);
             break;
         default:
-            LOGE("*** ERROR: BAD SIZE IN selfVerificationLoad: %d", size);
+            ALOGE("*** ERROR: BAD SIZE IN selfVerificationLoad: %d", size);
             data = 0;
             dvmAbort();
     }
 
-    //LOGD("*** HEAP LOAD: Addr: %#x Data: %#x Size: %d", addr, data, size);
+    //ALOGD("*** HEAP LOAD: Addr: %#x Data: %#x Size: %d", addr, data, size);
     return data;
 }
 
@@ -1825,7 +1824,7 @@ assert(0); /* MIPSTODO retarg func */
         }
     }
 
-    //LOGD("*** HEAP LOAD DOUBLEWORD: Addr: %#x Data: %#x Data2: %#x",
+    //ALOGD("*** HEAP LOAD DOUBLEWORD: Addr: %#x Data: %#x Data2: %#x",
     //    addr, data, data2);
     return (((s8) data2) << 32) | data;
 }
@@ -1846,7 +1845,7 @@ assert(0); /* MIPSTODO retarg func */
     int maskedAddr = addr & 0xFFFFFFFC;
     int alignment = addr & 0x3;
 
-    //LOGD("*** HEAP STORE: Addr: %#x Data: %#x Size: %d", addr, data, size);
+    //ALOGD("*** HEAP STORE: Addr: %#x Data: %#x Size: %d", addr, data, size);
 
     for (heapSpacePtr = shadowSpace->heapSpace;
          heapSpacePtr != shadowSpace->heapSpaceTail; heapSpacePtr++) {
@@ -1877,7 +1876,7 @@ assert(0); /* MIPSTODO retarg func */
             *((u4*) addr) = data;
             break;
         default:
-            LOGE("*** ERROR: BAD SIZE IN selfVerificationSave: %d", size);
+            ALOGE("*** ERROR: BAD SIZE IN selfVerificationSave: %d", size);
             dvmAbort();
     }
 }
@@ -1895,7 +1894,7 @@ assert(0); /* MIPSTODO retarg func */
     int data2 = double_data >> 32;
     bool store1 = false, store2 = false;
 
-    //LOGD("*** HEAP STORE DOUBLEWORD: Addr: %#x Data: %#x, Data2: %#x",
+    //ALOGD("*** HEAP STORE DOUBLEWORD: Addr: %#x Data: %#x, Data2: %#x",
     //    addr, data, data2);
 
     for (heapSpacePtr = shadowSpace->heapSpace;
@@ -2009,7 +2008,7 @@ assert(0); /* MIPSTODO retarg func */
 
     if ((insn & kMemOp2) == kMemOp2) {
         insn = (insn << 16) | (insn >> 16);
-        //LOGD("*** THUMB2 - Addr: %#x Insn: %#x", lr, insn);
+        //ALOGD("*** THUMB2 - Addr: %#x Insn: %#x", lr, insn);
 
         int opcode12 = (insn >> 20) & 0xFFF;
         int opcode6 = (insn >> 6) & 0x3F;
@@ -2094,7 +2093,7 @@ assert(0); /* MIPSTODO retarg func */
                     if (insn & 0x400000) rt |= 0x10;
                     rt = rt << 1;
                 } else {
-                    LOGE("*** ERROR: UNRECOGNIZED VECTOR MEM OP: %x", opcode4);
+                    ALOGE("*** ERROR: UNRECOGNIZED VECTOR MEM OP: %x", opcode4);
                     dvmAbort();
                 }
                 rt += 14;
@@ -2127,7 +2126,7 @@ assert(0); /* MIPSTODO retarg func */
                 offset = 0;
                 break;
             default:
-                LOGE("*** ERROR: UNRECOGNIZED THUMB2 MEM OP: %x", opcode12);
+                ALOGE("*** ERROR: UNRECOGNIZED THUMB2 MEM OP: %x", opcode12);
                 offset = 0;
                 dvmAbort();
         }
@@ -2135,7 +2134,7 @@ assert(0); /* MIPSTODO retarg func */
         // Handle the decoded mem op accordingly
         if (store) {
             if (size == kSVVariable) {
-                LOGD("*** THUMB2 STMIA CURRENTLY UNUSED (AND UNTESTED)");
+                ALOGD("*** THUMB2 STMIA CURRENTLY UNUSED (AND UNTESTED)");
                 int i;
                 int regList = insn & 0xFFFF;
                 for (i = 0; i < 16; i++) {
@@ -2156,7 +2155,7 @@ assert(0); /* MIPSTODO retarg func */
             }
         } else {
             if (size == kSVVariable) {
-                LOGD("*** THUMB2 LDMIA CURRENTLY UNUSED (AND UNTESTED)");
+                ALOGD("*** THUMB2 LDMIA CURRENTLY UNUSED (AND UNTESTED)");
                 int i;
                 int regList = insn & 0xFFFF;
                 for (i = 0; i < 16; i++) {
@@ -2177,7 +2176,7 @@ assert(0); /* MIPSTODO retarg func */
             }
         }
     } else {
-        //LOGD("*** THUMB - Addr: %#x Insn: %#x", lr, insn);
+        //ALOGD("*** THUMB - Addr: %#x Insn: %#x", lr, insn);
 
         // Update the link register
         selfVerificationMemRegStore(sp, old_lr+2, 13);
@@ -2277,7 +2276,7 @@ assert(0); /* MIPSTODO retarg func */
                 offset = 0;
                 break;
             default:
-                LOGE("*** ERROR: UNRECOGNIZED THUMB MEM OP: %x", opcode5);
+                ALOGE("*** ERROR: UNRECOGNIZED THUMB MEM OP: %x", opcode5);
                 offset = 0;
                 dvmAbort();
         }
diff --git a/vm/compiler/codegen/mips/CodegenCommon.cpp b/vm/compiler/codegen/mips/CodegenCommon.cpp
index 287e8c17b..0622fb841 100644
--- a/vm/compiler/codegen/mips/CodegenCommon.cpp
+++ b/vm/compiler/codegen/mips/CodegenCommon.cpp
@@ -64,7 +64,7 @@ static void setMemRefType(MipsLIR *lir, bool isLoad, int memType)
             *maskPtr |= ENCODE_MUST_NOT_ALIAS;
             break;
         default:
-            LOGE("Jit: invalid memref kind - %d", memType);
+            ALOGE("Jit: invalid memref kind - %d", memType);
             assert(0);  // Bail if debug build, set worst-case in the field
             *maskPtr |= ENCODE_ALL;
     }
@@ -310,7 +310,7 @@ static MipsLIR *newLIR3(CompilationUnit *cUnit, MipsOpCode opcode,
 {
     MipsLIR *insn = (MipsLIR *) dvmCompilerNew(sizeof(MipsLIR), true);
     if (!(EncodingMap[opcode].flags & IS_TERTIARY_OP)) {
-        LOGE("Bad LIR3: %s[%d]",EncodingMap[opcode].name,opcode);
+        ALOGE("Bad LIR3: %s[%d]",EncodingMap[opcode].name,opcode);
     }
     assert(isPseudoOpCode(opcode) ||
            (EncodingMap[opcode].flags & IS_TERTIARY_OP));
diff --git a/vm/compiler/codegen/mips/CodegenDriver.cpp b/vm/compiler/codegen/mips/CodegenDriver.cpp
index c7757fe17..bbe631cb0 100644
--- a/vm/compiler/codegen/mips/CodegenDriver.cpp
+++ b/vm/compiler/codegen/mips/CodegenDriver.cpp
@@ -795,7 +795,7 @@ static bool genArithOpLong(CompilationUnit *cUnit, MIR *mir,
             break;
         }
         default:
-            LOGE("Invalid long arith op");
+            ALOGE("Invalid long arith op");
             dvmCompilerAbort(cUnit);
     }
     if (!callOut) {
@@ -893,7 +893,7 @@ static bool genArithOpInt(CompilationUnit *cUnit, MIR *mir,
             op = kOpLsr;
             break;
         default:
-            LOGE("Invalid word arith op: %#x(%d)",
+            ALOGE("Invalid word arith op: %#x(%d)",
                  mir->dalvikInsn.opcode, mir->dalvikInsn.opcode);
             dvmCompilerAbort(cUnit);
     }
@@ -1079,9 +1079,6 @@ static void genProcessArgsRange(CompilationUnit *cUnit, MIR *mir,
     /*
      * Protect the loadMultiple instruction from being reordered with other
      * Dalvik stack accesses.
-     *
-     * This code is also shared by the invoke jumbo instructions, and this
-     * does not need to be done if the invoke jumbo has no arguments.
      */
     if (numArgs != 0) loadMultiple(cUnit, r4PC, regMask);
 
@@ -1548,7 +1545,7 @@ static bool handleFmt10x(CompilationUnit *cUnit, MIR *mir)
 {
     Opcode dalvikOpcode = mir->dalvikInsn.opcode;
     if ((dalvikOpcode >= OP_UNUSED_3E) && (dalvikOpcode <= OP_UNUSED_43)) {
-        LOGE("Codegen: got unused opcode %#x",dalvikOpcode);
+        ALOGE("Codegen: got unused opcode %#x",dalvikOpcode);
         return true;
     }
     switch (dalvikOpcode) {
@@ -1561,7 +1558,8 @@ static bool handleFmt10x(CompilationUnit *cUnit, MIR *mir)
         case OP_UNUSED_73:
         case OP_UNUSED_79:
         case OP_UNUSED_7A:
-            LOGE("Codegen: got unused opcode %#x",dalvikOpcode);
+        case OP_UNUSED_FF:
+            ALOGE("Codegen: got unused opcode %#x",dalvikOpcode);
             return true;
         case OP_NOP:
             break;
@@ -1635,14 +1633,14 @@ static bool handleFmt21h(CompilationUnit *cUnit, MIR *mir)
     return false;
 }
 
-static bool handleFmt20bc_Fmt40sc(CompilationUnit *cUnit, MIR *mir)
+static bool handleFmt20bc(CompilationUnit *cUnit, MIR *mir)
 {
-    /* For OP_THROW_VERIFICATION_ERROR & OP_THROW_VERIFICATION_ERROR_JUMBO */
+    /* For OP_THROW_VERIFICATION_ERROR */
     genInterpSingleStep(cUnit, mir);
     return false;
 }
 
-static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
+static bool handleFmt21c_Fmt31c(CompilationUnit *cUnit, MIR *mir)
 {
     RegLocation rlResult;
     RegLocation rlDest;
@@ -1656,7 +1654,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             if (strPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null string");
+                ALOGE("Unexpected null string");
                 dvmAbort();
             }
 
@@ -1666,14 +1664,13 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
             storeValue(cUnit, rlDest, rlResult);
             break;
         }
-        case OP_CONST_CLASS:
-        case OP_CONST_CLASS_JUMBO: {
+        case OP_CONST_CLASS: {
             void *classPtr = (void*)
               (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vB]);
 
             if (classPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null class");
+                ALOGE("Unexpected null class");
                 dvmAbort();
             }
 
@@ -1685,20 +1682,12 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
         }
         case OP_SGET:
         case OP_SGET_VOLATILE:
-        case OP_SGET_VOLATILE_JUMBO:
-        case OP_SGET_JUMBO:
         case OP_SGET_OBJECT:
         case OP_SGET_OBJECT_VOLATILE:
-        case OP_SGET_OBJECT_VOLATILE_JUMBO:
-        case OP_SGET_OBJECT_JUMBO:
         case OP_SGET_BOOLEAN:
-        case OP_SGET_BOOLEAN_JUMBO:
         case OP_SGET_CHAR:
-        case OP_SGET_CHAR_JUMBO:
         case OP_SGET_BYTE:
-        case OP_SGET_BYTE_JUMBO:
-        case OP_SGET_SHORT:
-        case OP_SGET_SHORT_JUMBO: {
+        case OP_SGET_SHORT: {
             int valOffset = OFFSETOF_MEMBER(StaticField, value);
             int tReg = dvmCompilerAllocTemp(cUnit);
             bool isVolatile;
@@ -1709,7 +1698,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             if (fieldPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null static field");
+                ALOGE("Unexpected null static field");
                 dvmAbort();
             }
 
@@ -1724,9 +1713,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 #if ANDROID_SMP != 0
             Opcode opcode = mir->dalvikInsn.opcode;
             isVolatile = (opcode == OP_SGET_VOLATILE) ||
-                         (opcode == OP_SGET_VOLATILE_JUMBO) ||
-                         (opcode == OP_SGET_OBJECT_VOLATILE) ||
-                         (opcode == OP_SGET_OBJECT_VOLATILE_JUMBO);
+                         (opcode == OP_SGET_OBJECT_VOLATILE);
             assert(isVolatile == dvmIsVolatileField((Field *) fieldPtr));
 #else
             isVolatile = dvmIsVolatileField((Field *) fieldPtr);
@@ -1746,8 +1733,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
             storeValue(cUnit, rlDest, rlResult);
             break;
         }
-        case OP_SGET_WIDE:
-        case OP_SGET_WIDE_JUMBO: {
+        case OP_SGET_WIDE: {
             int valOffset = OFFSETOF_MEMBER(StaticField, value);
             const Method *method = (mir->OptimizationFlags & MIR_CALLEE) ?
                 mir->meta.calleeMethod : cUnit->method;
@@ -1756,7 +1742,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             if (fieldPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null static field");
+                ALOGE("Unexpected null static field");
                 dvmAbort();
             }
 
@@ -1774,20 +1760,12 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
         }
         case OP_SPUT:
         case OP_SPUT_VOLATILE:
-        case OP_SPUT_VOLATILE_JUMBO:
-        case OP_SPUT_JUMBO:
         case OP_SPUT_OBJECT:
         case OP_SPUT_OBJECT_VOLATILE:
-        case OP_SPUT_OBJECT_VOLATILE_JUMBO:
-        case OP_SPUT_OBJECT_JUMBO:
         case OP_SPUT_BOOLEAN:
-        case OP_SPUT_BOOLEAN_JUMBO:
         case OP_SPUT_CHAR:
-        case OP_SPUT_CHAR_JUMBO:
         case OP_SPUT_BYTE:
-        case OP_SPUT_BYTE_JUMBO:
-        case OP_SPUT_SHORT:
-        case OP_SPUT_SHORT_JUMBO: {
+        case OP_SPUT_SHORT: {
             int valOffset = OFFSETOF_MEMBER(StaticField, value);
             int tReg = dvmCompilerAllocTemp(cUnit);
             int objHead = 0;
@@ -1801,24 +1779,20 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             if (fieldPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null static field");
+                ALOGE("Unexpected null static field");
                 dvmAbort();
             }
 
 #if ANDROID_SMP != 0
             isVolatile = (opcode == OP_SPUT_VOLATILE) ||
-                         (opcode == OP_SPUT_VOLATILE_JUMBO) ||
-                         (opcode == OP_SPUT_OBJECT_VOLATILE) ||
-                         (opcode == OP_SPUT_OBJECT_VOLATILE_JUMBO);
+                         (opcode == OP_SPUT_OBJECT_VOLATILE);
             assert(isVolatile == dvmIsVolatileField((Field *) fieldPtr));
 #else
             isVolatile = dvmIsVolatileField((Field *) fieldPtr);
 #endif
 
             isSputObject = (opcode == OP_SPUT_OBJECT) ||
-                           (opcode == OP_SPUT_OBJECT_JUMBO) ||
-                           (opcode == OP_SPUT_OBJECT_VOLATILE) ||
-                           (opcode == OP_SPUT_OBJECT_VOLATILE_JUMBO);
+                           (opcode == OP_SPUT_OBJECT_VOLATILE);
 
             rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
             rlSrc = loadValue(cUnit, rlSrc, kAnyReg);
@@ -1845,8 +1819,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             break;
         }
-        case OP_SPUT_WIDE:
-        case OP_SPUT_WIDE_JUMBO: {
+        case OP_SPUT_WIDE: {
             int tReg = dvmCompilerAllocTemp(cUnit);
             int valOffset = OFFSETOF_MEMBER(StaticField, value);
             const Method *method = (mir->OptimizationFlags & MIR_CALLEE) ?
@@ -1856,7 +1829,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             if (fieldPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null static field");
+                ALOGE("Unexpected null static field");
                 dvmAbort();
             }
 
@@ -1869,8 +1842,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
             HEAP_ACCESS_SHADOW(false);
             break;
         }
-        case OP_NEW_INSTANCE:
-        case OP_NEW_INSTANCE_JUMBO: {
+        case OP_NEW_INSTANCE: {
             /*
              * Obey the calling convention and don't mess with the register
              * usage.
@@ -1880,7 +1852,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
 
             if (classPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null class");
+                ALOGE("Unexpected null class");
                 dvmAbort();
             }
 
@@ -1916,8 +1888,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
             storeValue(cUnit, rlDest, rlResult);
             break;
         }
-        case OP_CHECK_CAST:
-        case OP_CHECK_CAST_JUMBO: {
+        case OP_CHECK_CAST: {
             /*
              * Obey the calling convention and don't mess with the register
              * usage.
@@ -1971,9 +1942,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
             break;
         }
         case OP_SGET_WIDE_VOLATILE:
-        case OP_SGET_WIDE_VOLATILE_JUMBO:
         case OP_SPUT_WIDE_VOLATILE:
-        case OP_SPUT_WIDE_VOLATILE_JUMBO:
             genInterpSingleStep(cUnit, mir);
             break;
         default:
@@ -2212,7 +2181,7 @@ static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             opc = kMipsBlez;
             break;
         default:
-            LOGE("Unexpected opcode (%d) for Fmt21t", dalvikOpcode);
+            ALOGE("Unexpected opcode (%d) for Fmt21t", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
     genConditionalBranchMips(cUnit, opc, rlSrc.lowReg, rt, &labelList[bb->taken->id]);
@@ -2460,7 +2429,7 @@ static bool handleFmt22b_Fmt22s(CompilationUnit *cUnit, MIR *mir)
     return false;
 }
 
-static bool handleFmt22c_Fmt52c(CompilationUnit *cUnit, MIR *mir)
+static bool handleFmt22c(CompilationUnit *cUnit, MIR *mir)
 {
     Opcode dalvikOpcode = mir->dalvikInsn.opcode;
     int fieldOffset = -1;
@@ -2470,50 +2439,30 @@ static bool handleFmt22c_Fmt52c(CompilationUnit *cUnit, MIR *mir)
          * Wide volatiles currently handled via single step.
          * Add them here if generating in-line code.
          *     case OP_IGET_WIDE_VOLATILE:
-         *     case OP_IGET_WIDE_VOLATILE_JUMBO:
          *     case OP_IPUT_WIDE_VOLATILE:
-         *     case OP_IPUT_WIDE_VOLATILE_JUMBO:
          */
         case OP_IGET_VOLATILE:
-        case OP_IGET_VOLATILE_JUMBO:
         case OP_IGET_OBJECT_VOLATILE:
-        case OP_IGET_OBJECT_VOLATILE_JUMBO:
         case OP_IPUT_VOLATILE:
-        case OP_IPUT_VOLATILE_JUMBO:
         case OP_IPUT_OBJECT_VOLATILE:
-        case OP_IPUT_OBJECT_VOLATILE_JUMBO:
 #if ANDROID_SMP != 0
             isVolatile = true;
         // NOTE: intentional fallthrough
 #endif
         case OP_IGET:
-        case OP_IGET_JUMBO:
         case OP_IGET_WIDE:
-        case OP_IGET_WIDE_JUMBO:
         case OP_IGET_OBJECT:
-        case OP_IGET_OBJECT_JUMBO:
         case OP_IGET_BOOLEAN:
-        case OP_IGET_BOOLEAN_JUMBO:
         case OP_IGET_BYTE:
-        case OP_IGET_BYTE_JUMBO:
         case OP_IGET_CHAR:
-        case OP_IGET_CHAR_JUMBO:
         case OP_IGET_SHORT:
-        case OP_IGET_SHORT_JUMBO:
         case OP_IPUT:
-        case OP_IPUT_JUMBO:
         case OP_IPUT_WIDE:
-        case OP_IPUT_WIDE_JUMBO:
         case OP_IPUT_OBJECT:
-        case OP_IPUT_OBJECT_JUMBO:
         case OP_IPUT_BOOLEAN:
-        case OP_IPUT_BOOLEAN_JUMBO:
         case OP_IPUT_BYTE:
-        case OP_IPUT_BYTE_JUMBO:
         case OP_IPUT_CHAR:
-        case OP_IPUT_CHAR_JUMBO:
-        case OP_IPUT_SHORT:
-        case OP_IPUT_SHORT_JUMBO: {
+        case OP_IPUT_SHORT: {
             const Method *method = (mir->OptimizationFlags & MIR_CALLEE) ?
                 mir->meta.calleeMethod : cUnit->method;
             Field *fieldPtr =
@@ -2521,7 +2470,7 @@ static bool handleFmt22c_Fmt52c(CompilationUnit *cUnit, MIR *mir)
 
             if (fieldPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null instance field");
+                ALOGE("Unexpected null instance field");
                 dvmAbort();
             }
 #if ANDROID_SMP != 0
@@ -2537,8 +2486,7 @@ static bool handleFmt22c_Fmt52c(CompilationUnit *cUnit, MIR *mir)
     }
 
     switch (dalvikOpcode) {
-        case OP_NEW_ARRAY:
-        case OP_NEW_ARRAY_JUMBO: {
+        case OP_NEW_ARRAY: {
 #if 0 /* 080 triggers assert in Interp.c:1290 for out of memory exception.
              i think the assert is in error and should be disabled. With
              asserts disabled, 080 passes. */
@@ -2554,7 +2502,7 @@ return false;
 
             if (classPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGE("Unexpected null class");
+                ALOGE("Unexpected null class");
                 dvmAbort();
             }
 
@@ -2589,8 +2537,7 @@ return false;
             storeValue(cUnit, rlDest, rlResult);
             break;
         }
-        case OP_INSTANCE_OF:
-        case OP_INSTANCE_OF_JUMBO: {
+        case OP_INSTANCE_OF: {
             // May generate a call - use explicit registers
             RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
             RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
@@ -2607,7 +2554,7 @@ return false;
              */
             if (classPtr == NULL) {
                 BAIL_LOOP_COMPILATION();
-                LOGD("null clazz in OP_INSTANCE_OF, single-stepping");
+                ALOGD("null clazz in OP_INSTANCE_OF, single-stepping");
                 genInterpSingleStep(cUnit, mir);
                 break;
             }
@@ -2637,55 +2584,35 @@ return false;
             break;
         }
         case OP_IGET_WIDE:
-        case OP_IGET_WIDE_JUMBO:
             genIGetWide(cUnit, mir, fieldOffset);
             break;
         case OP_IGET_VOLATILE:
-        case OP_IGET_VOLATILE_JUMBO:
         case OP_IGET_OBJECT_VOLATILE:
-        case OP_IGET_OBJECT_VOLATILE_JUMBO:
         case OP_IGET:
-        case OP_IGET_JUMBO:
         case OP_IGET_OBJECT:
-        case OP_IGET_OBJECT_JUMBO:
         case OP_IGET_BOOLEAN:
-        case OP_IGET_BOOLEAN_JUMBO:
         case OP_IGET_BYTE:
-        case OP_IGET_BYTE_JUMBO:
         case OP_IGET_CHAR:
-        case OP_IGET_CHAR_JUMBO:
         case OP_IGET_SHORT:
-        case OP_IGET_SHORT_JUMBO:
             genIGet(cUnit, mir, kWord, fieldOffset, isVolatile);
             break;
         case OP_IPUT_WIDE:
-        case OP_IPUT_WIDE_JUMBO:
             genIPutWide(cUnit, mir, fieldOffset);
             break;
         case OP_IPUT_VOLATILE:
-        case OP_IPUT_VOLATILE_JUMBO:
         case OP_IPUT:
-        case OP_IPUT_JUMBO:
         case OP_IPUT_BOOLEAN:
-        case OP_IPUT_BOOLEAN_JUMBO:
         case OP_IPUT_BYTE:
-        case OP_IPUT_BYTE_JUMBO:
         case OP_IPUT_CHAR:
-        case OP_IPUT_CHAR_JUMBO:
         case OP_IPUT_SHORT:
-        case OP_IPUT_SHORT_JUMBO:
             genIPut(cUnit, mir, kWord, fieldOffset, false, isVolatile);
             break;
         case OP_IPUT_OBJECT_VOLATILE:
-        case OP_IPUT_OBJECT_VOLATILE_JUMBO:
         case OP_IPUT_OBJECT:
-        case OP_IPUT_OBJECT_JUMBO:
             genIPut(cUnit, mir, kWord, fieldOffset, true, isVolatile);
             break;
         case OP_IGET_WIDE_VOLATILE:
-        case OP_IGET_WIDE_VOLATILE_JUMBO:
         case OP_IPUT_WIDE_VOLATILE:
-        case OP_IPUT_WIDE_VOLATILE_JUMBO:
             genInterpSingleStep(cUnit, mir);
             break;
         default:
@@ -2783,7 +2710,7 @@ static bool handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             break;
         default:
             cond = (MipsConditionCode)0;
-            LOGE("Unexpected opcode (%d) for Fmt22t", dalvikOpcode);
+            ALOGE("Unexpected opcode (%d) for Fmt22t", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
 
@@ -3145,7 +3072,7 @@ static void genLandingPadForMispredictedCallee(CompilationUnit *cUnit, MIR *mir,
     mir->meta.callsiteInfo->misPredBranchOver->target = (LIR *) target;
 }
 
-static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
+static bool handleFmt35c_3rc(CompilationUnit *cUnit, MIR *mir,
                              BasicBlock *bb, MipsLIR *labelList)
 {
     MipsLIR *retChainingCell = NULL;
@@ -3166,8 +3093,7 @@ static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
          * ]
          */
         case OP_INVOKE_VIRTUAL:
-        case OP_INVOKE_VIRTUAL_RANGE:
-        case OP_INVOKE_VIRTUAL_JUMBO: {
+        case OP_INVOKE_VIRTUAL_RANGE: {
             MipsLIR *predChainingCell = &labelList[bb->taken->id];
             int methodIndex =
                 cUnit->method->clazz->pDvmDex->pResMethods[dInsn->vB]->
@@ -3198,8 +3124,7 @@ static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
          *                ->pResMethods[BBBB]->methodIndex]
          */
         case OP_INVOKE_SUPER:
-        case OP_INVOKE_SUPER_RANGE:
-        case OP_INVOKE_SUPER_JUMBO: {
+        case OP_INVOKE_SUPER_RANGE: {
             /* Grab the method ptr directly from what the interpreter sees */
             const Method *calleeMethod = mir->meta.callsiteInfo->method;
             assert(calleeMethod == cUnit->method->clazz->super->vtable[
@@ -3228,8 +3153,7 @@ static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
         }
         /* calleeMethod = method->clazz->pDvmDex->pResMethods[BBBB] */
         case OP_INVOKE_DIRECT:
-        case OP_INVOKE_DIRECT_RANGE:
-        case OP_INVOKE_DIRECT_JUMBO: {
+        case OP_INVOKE_DIRECT_RANGE: {
             /* Grab the method ptr directly from what the interpreter sees */
             const Method *calleeMethod = mir->meta.callsiteInfo->method;
             assert(calleeMethod ==
@@ -3249,8 +3173,7 @@ static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
         }
         /* calleeMethod = method->clazz->pDvmDex->pResMethods[BBBB] */
         case OP_INVOKE_STATIC:
-        case OP_INVOKE_STATIC_RANGE:
-        case OP_INVOKE_STATIC_JUMBO: {
+        case OP_INVOKE_STATIC_RANGE: {
             /* Grab the method ptr directly from what the interpreter sees */
             const Method *calleeMethod = mir->meta.callsiteInfo->method;
             assert(calleeMethod ==
@@ -3381,8 +3304,7 @@ static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
          * -------- end of chaining cells (0x0190)
          */
         case OP_INVOKE_INTERFACE:
-        case OP_INVOKE_INTERFACE_RANGE:
-        case OP_INVOKE_INTERFACE_JUMBO: {
+        case OP_INVOKE_INTERFACE_RANGE: {
             MipsLIR *predChainingCell = &labelList[bb->taken->id];
 
             /*
@@ -3539,11 +3461,9 @@ static bool handleFmt35c_3rc_5rc(CompilationUnit *cUnit, MIR *mir,
             genTrap(cUnit, mir->offset, pcrLabel);
             break;
         }
-        case OP_INVOKE_OBJECT_INIT_JUMBO:
         case OP_INVOKE_OBJECT_INIT_RANGE:
         case OP_FILLED_NEW_ARRAY:
-        case OP_FILLED_NEW_ARRAY_RANGE:
-        case OP_FILLED_NEW_ARRAY_JUMBO: {
+        case OP_FILLED_NEW_ARRAY_RANGE: {
             /* Just let the interpreter deal with these */
             genInterpSingleStep(cUnit, mir);
             break;
@@ -4353,11 +4273,8 @@ assert(0); /* MIPSTODO port selfVerificationPuntOps() */
         case OP_MONITOR_ENTER:
         case OP_MONITOR_EXIT:
         case OP_NEW_INSTANCE:
-        case OP_NEW_INSTANCE_JUMBO:
         case OP_NEW_ARRAY:
-        case OP_NEW_ARRAY_JUMBO:
         case OP_CHECK_CAST:
-        case OP_CHECK_CAST_JUMBO:
         case OP_MOVE_EXCEPTION:
         case OP_FILL_ARRAY_DATA:
         case OP_EXECUTE_INLINE:
@@ -4596,13 +4513,11 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                             notHandled = handleFmt12x(cUnit, mir);
                             break;
                         case kFmt20bc:
-                        case kFmt40sc:
-                            notHandled = handleFmt20bc_Fmt40sc(cUnit, mir);
+                            notHandled = handleFmt20bc(cUnit, mir);
                             break;
                         case kFmt21c:
                         case kFmt31c:
-                        case kFmt41c:
-                            notHandled = handleFmt21c_Fmt31c_Fmt41c(cUnit, mir);
+                            notHandled = handleFmt21c_Fmt31c(cUnit, mir);
                             break;
                         case kFmt21h:
                             notHandled = handleFmt21h(cUnit, mir);
@@ -4619,8 +4534,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                             notHandled = handleFmt22b_Fmt22s(cUnit, mir);
                             break;
                         case kFmt22c:
-                        case kFmt52c:
-                            notHandled = handleFmt22c_Fmt52c(cUnit, mir);
+                            notHandled = handleFmt22c(cUnit, mir);
                             break;
                         case kFmt22cs:
                             notHandled = handleFmt22cs(cUnit, mir);
@@ -4641,8 +4555,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                             break;
                         case kFmt3rc:
                         case kFmt35c:
-                        case kFmt5rc:
-                            notHandled = handleFmt35c_3rc_5rc(cUnit, mir, bb,
+                            notHandled = handleFmt35c_3rc(cUnit, mir, bb,
                                                           labelList);
                             break;
                         case kFmt3rms:
@@ -4663,7 +4576,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                     }
                 }
                 if (notHandled) {
-                    LOGE("%#06x: Opcode %#x (%s) / Fmt %d not handled",
+                    ALOGE("%#06x: Opcode %#x (%s) / Fmt %d not handled",
                          mir->offset,
                          dalvikOpcode, dexGetOpcodeName(dalvikOpcode),
                          dalvikFormat);
@@ -4747,7 +4660,7 @@ gen_fallthrough:
                         chainingBlock->startOffset);
                     break;
                 default:
-                    LOGE("Bad blocktype %d", chainingBlock->blockType);
+                    ALOGE("Bad blocktype %d", chainingBlock->blockType);
                     dvmCompilerAbort(cUnit);
             }
         }
@@ -4818,7 +4731,7 @@ bool dvmCompilerDoWork(CompilerWorkOrder *work)
             break;
         default:
             isCompile = false;
-            LOGE("Jit: unknown work order type");
+            ALOGE("Jit: unknown work order type");
             assert(0);  // Bail if debug build, discard otherwise
     }
     if (!success)
@@ -4868,7 +4781,7 @@ void dvmCompilerArchDump(void)
         }
     }
     if (strlen(buf)) {
-        LOGD("dalvik.vm.jit.op = %s", buf);
+        ALOGD("dalvik.vm.jit.op = %s", buf);
     }
 }
 
@@ -4879,7 +4792,7 @@ bool dvmCompilerArchInit()
 
     for (i = 0; i < kMipsLast; i++) {
         if (EncodingMap[i].opcode != i) {
-            LOGE("Encoding order for %s is wrong: expecting %d, seeing %d",
+            ALOGE("Encoding order for %s is wrong: expecting %d, seeing %d",
                  EncodingMap[i].name, i, EncodingMap[i].opcode);
             dvmAbort();  // OK to dvmAbort - build error
         }
diff --git a/vm/compiler/codegen/mips/CodegenFactory.cpp b/vm/compiler/codegen/mips/CodegenFactory.cpp
index 1b604ec98..a1211cc70 100644
--- a/vm/compiler/codegen/mips/CodegenFactory.cpp
+++ b/vm/compiler/codegen/mips/CodegenFactory.cpp
@@ -296,7 +296,7 @@ static MipsLIR *genRegRegCheck(CompilationUnit *cUnit,
         MipsLIR *branch = opCompareBranch(cUnit, kMipsBeqz, tReg, -1);
         genCheckCommon(cUnit, dOffset, branch, pcrLabel);
     } else {
-        LOGE("Unexpected condition in genRegRegCheck: %d\n", (int) cond);
+        ALOGE("Unexpected condition in genRegRegCheck: %d\n", (int) cond);
         dvmAbort();
     }
     return res;
diff --git a/vm/compiler/codegen/mips/Mips32/Factory.cpp b/vm/compiler/codegen/mips/Mips32/Factory.cpp
index 9a158b46b..c6d777505 100644
--- a/vm/compiler/codegen/mips/Mips32/Factory.cpp
+++ b/vm/compiler/codegen/mips/Mips32/Factory.cpp
@@ -161,7 +161,7 @@ static MipsLIR *opNone(CompilationUnit *cUnit, OpKind op)
             opcode = kMipsB;
             break;
         default:
-            LOGE("Jit: bad case in opNone");
+            ALOGE("Jit: bad case in opNone");
             dvmCompilerAbort(cUnit);
     }
     res = newLIR0(cUnit, opcode);
@@ -214,7 +214,7 @@ static MipsLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
             return opRegRegImm(cUnit, op, rDestSrc1, rDestSrc1, value);
             break;
         default:
-            LOGE("Jit: bad case in opRegImm");
+            ALOGE("Jit: bad case in opRegImm");
             dvmCompilerAbort(cUnit);
             break;
     }
@@ -264,7 +264,7 @@ static MipsLIR *opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest,
             opcode = kMipsSrav;
             break;
         default:
-            LOGE("Jit: bad case in opRegRegReg");
+            ALOGE("Jit: bad case in opRegRegReg");
             dvmCompilerAbort(cUnit);
             break;
     }
@@ -342,7 +342,7 @@ static MipsLIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
             opcode = kMipsMul;
             break;
         default:
-            LOGE("Jit: bad case in opRegRegImm");
+            ALOGE("Jit: bad case in opRegRegImm");
             dvmCompilerAbort(cUnit);
             break;
     }
@@ -401,7 +401,7 @@ static MipsLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
         case kOp2Char:
              return newLIR3(cUnit, kMipsAndi, rDestSrc1, rSrc2, 0xFFFF);
         default:
-            LOGE("Jit: bad case in opRegReg");
+            ALOGE("Jit: bad case in opRegReg");
             dvmCompilerAbort(cUnit);
             break;
     }
@@ -466,7 +466,7 @@ static MipsLIR *loadBaseIndexed(CompilationUnit *cUnit, int rBase,
             opcode = kMipsLb;
             break;
         default:
-            LOGE("Jit: bad case in loadBaseIndexed");
+            ALOGE("Jit: bad case in loadBaseIndexed");
             dvmCompilerAbort(cUnit);
     }
 
@@ -525,7 +525,7 @@ static MipsLIR *storeBaseIndexed(CompilationUnit *cUnit, int rBase,
             opcode = kMipsSb;
             break;
         default:
-            LOGE("Jit: bad case in storeBaseIndexed");
+            ALOGE("Jit: bad case in storeBaseIndexed");
             dvmCompilerAbort(cUnit);
     }
     res = newLIR3(cUnit, opcode, rSrc, 0, tReg);
@@ -654,7 +654,7 @@ static MipsLIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase,
             opcode = kMipsLb;
             break;
         default:
-            LOGE("Jit: bad case in loadBaseIndexedBody");
+            ALOGE("Jit: bad case in loadBaseIndexedBody");
             dvmCompilerAbort(cUnit);
     }
 
@@ -767,7 +767,7 @@ static MipsLIR *storeBaseDispBody(CompilationUnit *cUnit, int rBase,
             opcode = kMipsSb;
             break;
         default:
-            LOGE("Jit: bad case in storeBaseIndexedBody");
+            ALOGE("Jit: bad case in storeBaseIndexedBody");
             dvmCompilerAbort(cUnit);
     }
 
@@ -925,7 +925,7 @@ static inline MipsLIR *genRegImmCheck(CompilationUnit *cUnit,
         } else if (cond == kMipsCondGe) {
             opc = kMipsBgez;
         } else {
-            LOGE("Jit: bad case in genRegImmCheck");
+            ALOGE("Jit: bad case in genRegImmCheck");
             dvmCompilerAbort(cUnit);
         }
         branch = opCompareBranch(cUnit, opc, reg, -1);
@@ -936,11 +936,11 @@ static inline MipsLIR *genRegImmCheck(CompilationUnit *cUnit,
             branch = opCompareBranch(cUnit, kMipsBne, tReg, r_ZERO);
             dvmCompilerFreeTemp(cUnit, tReg);
         } else {
-            LOGE("Jit: bad case in genRegImmCheck");
+            ALOGE("Jit: bad case in genRegImmCheck");
             dvmCompilerAbort(cUnit);
         }
     } else {
-        LOGE("Jit: bad case in genRegImmCheck");
+        ALOGE("Jit: bad case in genRegImmCheck");
         dvmCompilerAbort(cUnit);
     }
 
@@ -952,7 +952,7 @@ static inline MipsLIR *genRegImmCheck(CompilationUnit *cUnit,
             branch->generic.target = (LIR *) exceptionLabel;
             return exceptionLabel;
         } else {
-            LOGE("Catch blocks not handled yet");
+            ALOGE("Catch blocks not handled yet");
             dvmAbort();
             return NULL;
         }
diff --git a/vm/compiler/codegen/mips/RallocUtil.cpp b/vm/compiler/codegen/mips/RallocUtil.cpp
index 190437335..b13dddfd7 100644
--- a/vm/compiler/codegen/mips/RallocUtil.cpp
+++ b/vm/compiler/codegen/mips/RallocUtil.cpp
@@ -73,13 +73,13 @@ extern void dvmCompilerInitPool(RegisterInfo *regs, int *regNums, int num)
 static void dumpRegPool(RegisterInfo *p, int numRegs)
 {
     int i;
-    LOGE("================================================");
+    ALOGE("================================================");
     for (i=0; i < numRegs; i++ ){
-        LOGE("R[%d]: U:%d, P:%d, part:%d, LV:%d, D:%d, SR:%d, ST:%x, EN:%x",
+        ALOGE("R[%d]: U:%d, P:%d, part:%d, LV:%d, D:%d, SR:%d, ST:%x, EN:%x",
            p[i].reg, p[i].inUse, p[i].pair, p[i].partner, p[i].live,
            p[i].dirty, p[i].sReg,(int)p[i].defStart, (int)p[i].defEnd);
     }
-    LOGE("================================================");
+    ALOGE("================================================");
 }
 
 static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg)
@@ -99,7 +99,7 @@ static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg)
             return &p[i];
         }
     }
-    LOGE("Tried to get info on a non-existant temp: r%d",reg);
+    ALOGE("Tried to get info on a non-existant temp: r%d",reg);
     dvmCompilerAbort(cUnit);
     return NULL;
 }
@@ -225,7 +225,7 @@ static int allocTempBody(CompilationUnit *cUnit, RegisterInfo *p, int numTemps,
         next++;
     }
     if (required) {
-        LOGE("No free temp registers");
+        ALOGE("No free temp registers");
         dvmCompilerAbort(cUnit);
     }
     return -1;  // No register available
@@ -273,7 +273,7 @@ extern int dvmCompilerAllocTempDouble(CompilationUnit *cUnit)
         }
         next += 2;
     }
-    LOGE("No free temp registers");
+    ALOGE("No free temp registers");
     dvmCompilerAbort(cUnit);
     return -1;
 }
@@ -334,7 +334,7 @@ static RegisterInfo *allocLive(CompilationUnit *cUnit, int sReg,
                                 cUnit->regPool->numFPTemps, sReg);
             break;
         default:
-            LOGE("Invalid register type");
+            ALOGE("Invalid register type");
             dvmCompilerAbort(cUnit);
     }
     return res;
@@ -361,7 +361,7 @@ extern void dvmCompilerFreeTemp(CompilationUnit *cUnit, int reg)
             return;
         }
     }
-    LOGE("Tried to free a non-existant temp: r%d",reg);
+    ALOGE("Tried to free a non-existant temp: r%d",reg);
     dvmCompilerAbort(cUnit);
 }
 
@@ -435,7 +435,7 @@ extern void dvmCompilerLockTemp(CompilationUnit *cUnit, int reg)
             return;
         }
     }
-    LOGE("Tried to lock a non-existant temp: r%d",reg);
+    ALOGE("Tried to lock a non-existant temp: r%d",reg);
     dvmCompilerAbort(cUnit);
 }
 
diff --git a/vm/compiler/codegen/mips/mips/ArchVariant.cpp b/vm/compiler/codegen/mips/mips/ArchVariant.cpp
index 51a590a6a..9204a5898 100644
--- a/vm/compiler/codegen/mips/mips/ArchVariant.cpp
+++ b/vm/compiler/codegen/mips/mips/ArchVariant.cpp
@@ -95,7 +95,7 @@ int dvmCompilerTargetOptHint(int key)
             res = 2;
             break;
         default:
-            LOGE("Unknown target optimization hint key: %d",key);
+            ALOGE("Unknown target optimization hint key: %d",key);
             res = 0;
     }
     return res;
diff --git a/vm/compiler/codegen/mips/mips/MethodCodegenDriver.cpp b/vm/compiler/codegen/mips/mips/MethodCodegenDriver.cpp
index 735a4787b..55c2d899b 100644
--- a/vm/compiler/codegen/mips/mips/MethodCodegenDriver.cpp
+++ b/vm/compiler/codegen/mips/mips/MethodCodegenDriver.cpp
@@ -16,6 +16,6 @@
 
 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit)
 {
-    LOGE("Method-based JIT not supported for the Mips target");
+    ALOGE("Method-based JIT not supported for the Mips target");
     dvmAbort();
 }