Merge remote branch 'goog/dalvik-dev' into dalvik-dev-to-master

Change-Id: I99c4289bd34f63b0b970b6ed0fa992b44e805393

34 files changed, 158 insertions, 155 deletions

diff --git a/vm/compiler/codegen/arm/ArchFactory.c b/vm/compiler/codegen/arm/ArchFactory.cpp
index 5a03b17ad..5a03b17ad 100644
--- a/vm/compiler/codegen/arm/ArchFactory.c
+++ b/vm/compiler/codegen/arm/ArchFactory.cpp
diff --git a/vm/compiler/codegen/arm/ArchUtility.c b/vm/compiler/codegen/arm/ArchUtility.cpp
index edcbf86a0..f3a2a4b37 100644
--- a/vm/compiler/codegen/arm/ArchUtility.c
+++ b/vm/compiler/codegen/arm/ArchUtility.cpp
@@ -18,7 +18,7 @@
 #include "libdex/DexOpcodes.h"
 #include "ArmLIR.h"
 
-static char *shiftNames[4] = {
+static const char *shiftNames[4] = {
     "lsl",
     "lsr",
     "asr",
@@ -73,14 +73,14 @@ static int expandImmediate(int value)
  * Interpret a format string and build a string no longer than size
  * See format key in Assemble.c.
  */
-static void buildInsnString(char *fmt, ArmLIR *lir, char* buf,
+static void buildInsnString(const char *fmt, ArmLIR *lir, char* buf,
                             unsigned char *baseAddr, int size)
 {
     int i;
     char *bufEnd = &buf[size-1];
-    char *fmtEnd = &fmt[strlen(fmt)];
+    const char *fmtEnd = &fmt[strlen(fmt)];
     char tbuf[256];
-    char *name;
+    const char *name;
     char nc;
     while (fmt < fmtEnd) {
         int operand;
diff --git a/vm/compiler/codegen/arm/ArmLIR.h b/vm/compiler/codegen/arm/ArmLIR.h
index a187cfab0..46316ff46 100644
--- a/vm/compiler/codegen/arm/ArmLIR.h
+++ b/vm/compiler/codegen/arm/ArmLIR.h
@@ -734,8 +734,8 @@ typedef struct ArmEncodingMap {
     } fieldLoc[4];
     ArmOpcode opcode;
     int flags;
-    char *name;
-    char* fmt;
+    const char* name;
+    const char* fmt;
     int size;
 } ArmEncodingMap;
 
diff --git a/vm/compiler/codegen/arm/ArmRallocUtil.c b/vm/compiler/codegen/arm/ArmRallocUtil.cpp
index 3a5afa28c..3a5afa28c 100644
--- a/vm/compiler/codegen/arm/ArmRallocUtil.c
+++ b/vm/compiler/codegen/arm/ArmRallocUtil.cpp
diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.cpp
index 7c22de75d..a433c31d4 100644
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.cpp
@@ -1758,6 +1758,8 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
     newRechainCount = PREDICTED_CHAIN_COUNTER_AVOID;
     goto done;
 #else
+    PredictedChainingCell newCell;
+    int baseAddr, branchOffset, tgtAddr;
     if (dvmIsNativeMethod(method)) {
         UNPROTECT_CODE_CACHE(cell, sizeof(*cell));
 
@@ -1772,7 +1774,7 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
         PROTECT_CODE_CACHE(cell, sizeof(*cell));
         goto done;
     }
-    int tgtAddr = (int) dvmJitGetTraceAddr(method->insns);
+    tgtAddr = (int) dvmJitGetTraceAddr(method->insns);
 
     /*
      * Compilation not made yet for the callee. Reset the counter to a small
@@ -1786,14 +1788,12 @@ const Method *dvmJitToPatchPredictedChain(const Method *method,
         goto done;
     }
 
-    PredictedChainingCell newCell;
-
     if (cell->clazz == NULL) {
         newRechainCount = self->icRechainCount;
     }
 
-    int baseAddr = (int) cell + 4;   // PC is cur_addr + 4
-    int branchOffset = tgtAddr - baseAddr;
+    baseAddr = (int) cell + 4;   // PC is cur_addr + 4
+    branchOffset = tgtAddr - baseAddr;
 
     newCell.branch = assembleChainingBranch(branchOffset, true);
     newCell.clazz = clazz;
diff --git a/vm/compiler/codegen/arm/CalloutHelper.h b/vm/compiler/codegen/arm/CalloutHelper.h
index 931cf0f7e..2660108df 100644
--- a/vm/compiler/codegen/arm/CalloutHelper.h
+++ b/vm/compiler/codegen/arm/CalloutHelper.h
@@ -31,37 +31,37 @@
 #define LOAD_FUNC_ADDR(cUnit, reg, addr) loadConstant(cUnit, reg, addr)
 
 /* Conversions */
-float __aeabi_i2f(int op1);             // OP_INT_TO_FLOAT
-int __aeabi_f2iz(float op1);            // OP_FLOAT_TO_INT
-float __aeabi_d2f(double op1);          // OP_DOUBLE_TO_FLOAT
-double __aeabi_f2d(float op1);          // OP_FLOAT_TO_DOUBLE
-double __aeabi_i2d(int op1);            // OP_INT_TO_DOUBLE
-int __aeabi_d2iz(double op1);           // OP_DOUBLE_TO_INT
-float __aeabi_l2f(long op1);            // OP_LONG_TO_FLOAT
-double __aeabi_l2d(long op1);           // OP_LONG_TO_DOUBLE
+extern "C" float __aeabi_i2f(int op1);             // OP_INT_TO_FLOAT
+extern "C" int __aeabi_f2iz(float op1);            // OP_FLOAT_TO_INT
+extern "C" float __aeabi_d2f(double op1);          // OP_DOUBLE_TO_FLOAT
+extern "C" double __aeabi_f2d(float op1);          // OP_FLOAT_TO_DOUBLE
+extern "C" double __aeabi_i2d(int op1);            // OP_INT_TO_DOUBLE
+extern "C" int __aeabi_d2iz(double op1);           // OP_DOUBLE_TO_INT
+extern "C" float __aeabi_l2f(long op1);            // OP_LONG_TO_FLOAT
+extern "C" double __aeabi_l2d(long op1);           // OP_LONG_TO_DOUBLE
 s8 dvmJitf2l(float op1);                // OP_FLOAT_TO_LONG
 s8 dvmJitd2l(double op1);               // OP_DOUBLE_TO_LONG
 
 /* Single-precision FP arithmetics */
-float __aeabi_fadd(float a, float b);   // OP_ADD_FLOAT[_2ADDR]
-float __aeabi_fsub(float a, float b);   // OP_SUB_FLOAT[_2ADDR]
-float __aeabi_fdiv(float a, float b);   // OP_DIV_FLOAT[_2ADDR]
-float __aeabi_fmul(float a, float b);   // OP_MUL_FLOAT[_2ADDR]
-float fmodf(float a, float b);          // OP_REM_FLOAT[_2ADDR]
+extern "C" float __aeabi_fadd(float a, float b);   // OP_ADD_FLOAT[_2ADDR]
+extern "C" float __aeabi_fsub(float a, float b);   // OP_SUB_FLOAT[_2ADDR]
+extern "C" float __aeabi_fdiv(float a, float b);   // OP_DIV_FLOAT[_2ADDR]
+extern "C" float __aeabi_fmul(float a, float b);   // OP_MUL_FLOAT[_2ADDR]
+extern "C" float fmodf(float a, float b);          // OP_REM_FLOAT[_2ADDR]
 
 /* Double-precision FP arithmetics */
-double __aeabi_dadd(double a, double b); // OP_ADD_DOUBLE[_2ADDR]
-double __aeabi_dsub(double a, double b); // OP_SUB_DOUBLE[_2ADDR]
-double __aeabi_ddiv(double a, double b); // OP_DIV_DOUBLE[_2ADDR]
-double __aeabi_dmul(double a, double b); // OP_MUL_DOUBLE[_2ADDR]
-double fmod(double a, double b);         // OP_REM_DOUBLE[_2ADDR]
+extern "C" double __aeabi_dadd(double a, double b); // OP_ADD_DOUBLE[_2ADDR]
+extern "C" double __aeabi_dsub(double a, double b); // OP_SUB_DOUBLE[_2ADDR]
+extern "C" double __aeabi_ddiv(double a, double b); // OP_DIV_DOUBLE[_2ADDR]
+extern "C" double __aeabi_dmul(double a, double b); // OP_MUL_DOUBLE[_2ADDR]
+extern "C" double fmod(double a, double b);         // OP_REM_DOUBLE[_2ADDR]
 
 /* Integer arithmetics */
-int __aeabi_idivmod(int op1, int op2);  // OP_REM_INT[_2ADDR|_LIT8|_LIT16]
-int __aeabi_idiv(int op1, int op2);     // OP_DIV_INT[_2ADDR|_LIT8|_LIT16]
+extern "C" int __aeabi_idivmod(int op1, int op2);  // OP_REM_INT[_2ADDR|_LIT8|_LIT16]
+extern "C" int __aeabi_idiv(int op1, int op2);     // OP_DIV_INT[_2ADDR|_LIT8|_LIT16]
 
 /* Long long arithmetics - OP_REM_LONG[_2ADDR] & OP_DIV_LONG[_2ADDR] */
-long long __aeabi_ldivmod(long long op1, long long op2);
+extern "C" long long __aeabi_ldivmod(long long op1, long long op2);
 
 /* Originally declared in Sync.h */
 bool dvmUnlockObject(struct Thread* self, struct Object* obj); //OP_MONITOR_EXIT
@@ -110,7 +110,7 @@ Object* dvmAllocObject(ClassObject* clazz, int flags);  // OP_NEW_INSTANCE
  * Functions declared in gDvmInlineOpsTable[] are used for
  * OP_EXECUTE_INLINE & OP_EXECUTE_INLINE_RANGE.
  */
-double sqrt(double x);  // INLINE_MATH_SQRT
+extern "C" double sqrt(double x);  // INLINE_MATH_SQRT
 
 /*
  * The following functions are invoked through the compiler templates (declared
diff --git a/vm/compiler/codegen/arm/Codegen.h b/vm/compiler/codegen/arm/Codegen.h
index 330619b29..e67f3d8a1 100644
--- a/vm/compiler/codegen/arm/Codegen.h
+++ b/vm/compiler/codegen/arm/Codegen.h
@@ -56,7 +56,7 @@ static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir);
 
 #if defined(WITH_SELF_VERIFICATION)
 /* Self Verification memory instruction decoder */
-void dvmSelfVerificationMemOpDecode(int lr, int* sp);
+extern "C" void dvmSelfVerificationMemOpDecode(int lr, int* sp);
 #endif
 
 extern void dvmCompilerSetupResourceMasks(ArmLIR *lir);
diff --git a/vm/compiler/codegen/arm/CodegenCommon.c b/vm/compiler/codegen/arm/CodegenCommon.cpp
index ae41fe9af..ae41fe9af 100644
--- a/vm/compiler/codegen/arm/CodegenCommon.c
+++ b/vm/compiler/codegen/arm/CodegenCommon.cpp
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.cpp
index e94fc1175..1a8ac4203 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.cpp
@@ -404,8 +404,8 @@ static void genArrayGet(CompilationUnit *cUnit, MIR *mir, OpSize size,
                         RegLocation rlDest, int scale)
 {
     RegisterClass regClass = dvmCompilerRegClassBySize(size);
-    int lenOffset = offsetof(ArrayObject, length);
-    int dataOffset = offsetof(ArrayObject, contents);
+    int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
+    int dataOffset = OFFSETOF_MEMBER(ArrayObject, contents);
     RegLocation rlResult;
     rlArray = loadValue(cUnit, rlArray, kCoreReg);
     rlIndex = loadValue(cUnit, rlIndex, kCoreReg);
@@ -473,8 +473,8 @@ static void genArrayPut(CompilationUnit *cUnit, MIR *mir, OpSize size,
                         RegLocation rlSrc, int scale)
 {
     RegisterClass regClass = dvmCompilerRegClassBySize(size);
-    int lenOffset = offsetof(ArrayObject, length);
-    int dataOffset = offsetof(ArrayObject, contents);
+    int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
+    int dataOffset = OFFSETOF_MEMBER(ArrayObject, contents);
 
     int regPtr;
     rlArray = loadValue(cUnit, rlArray, kCoreReg);
@@ -547,8 +547,8 @@ static void genArrayObjectPut(CompilationUnit *cUnit, MIR *mir,
                               RegLocation rlArray, RegLocation rlIndex,
                               RegLocation rlSrc, int scale)
 {
-    int lenOffset = offsetof(ArrayObject, length);
-    int dataOffset = offsetof(ArrayObject, contents);
+    int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
+    int dataOffset = OFFSETOF_MEMBER(ArrayObject, contents);
 
     dvmCompilerFlushAllRegs(cUnit);
 
@@ -769,7 +769,7 @@ static bool genArithOpInt(CompilationUnit *cUnit, MIR *mir,
     bool checkZero = false;
     bool unary = false;
     int retReg = r0;
-    void *callTgt;
+    int (*callTgt)(int, int);
     RegLocation rlResult;
     bool shiftOp = false;
 
@@ -2076,7 +2076,7 @@ static bool handleFmt12x(CompilationUnit *cUnit, MIR *mir)
             storeValue(cUnit, rlDest, rlResult);
             break;
         case OP_ARRAY_LENGTH: {
-            int lenOffset = offsetof(ArrayObject, length);
+            int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
             genNullCheck(cUnit, rlSrc.sRegLow, rlSrc.lowReg,
                          mir->offset, NULL);
@@ -2155,7 +2155,7 @@ static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             cond = kArmCondLe;
             break;
         default:
-            cond = 0;
+            cond = (ArmConditionCode)0;
             LOGE("Unexpected opcode (%d) for Fmt21t\n", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
@@ -2294,7 +2294,7 @@ static bool handleFmt22b_Fmt22s(CompilationUnit *cUnit, MIR *mir)
     RegLocation rlDest = dvmCompilerGetDest(cUnit, mir, 0);
     RegLocation rlResult;
     int lit = mir->dalvikInsn.vC;
-    OpKind op = 0;      /* Make gcc happy */
+    OpKind op = (OpKind)0;      /* Make gcc happy */
     int shiftOp = false;
     bool isDiv = false;
 
@@ -2700,7 +2700,7 @@ static bool handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             cond = kArmCondLe;
             break;
         default:
-            cond = 0;
+            cond = (ArmConditionCode)0;
             LOGE("Unexpected opcode (%d) for Fmt22t\n", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
@@ -3576,7 +3576,7 @@ static bool genInlinedStringIsEmpty(CompilationUnit *cUnit, MIR *mir)
 
 static bool genInlinedStringCharAt(CompilationUnit *cUnit, MIR *mir)
 {
-    int contents = offsetof(ArrayObject, contents);
+    int contents = OFFSETOF_MEMBER(ArrayObject, contents);
     RegLocation rlObj = dvmCompilerGetSrc(cUnit, mir, 0);
     RegLocation rlIdx = dvmCompilerGetSrc(cUnit, mir, 1);
     RegLocation rlDest = inlinedTarget(cUnit, mir, false);
@@ -3913,7 +3913,7 @@ static void handlePCReconstruction(CompilationUnit *cUnit,
     }
 }
 
-static char *extendedMIROpNames[kMirOpLast - kMirOpFirst] = {
+static const char *extendedMIROpNames[kMirOpLast - kMirOpFirst] = {
     "kMirOpPhi",
     "kMirOpNullNRangeUpCheck",
     "kMirOpNullNRangeDownCheck",
@@ -3939,7 +3939,7 @@ static void genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir)
      * ssa name.
      */
     DecodedInstruction *dInsn = &mir->dalvikInsn;
-    const int lenOffset = offsetof(ArrayObject, length);
+    const int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
     const int maxC = dInsn->arg[0];
     int regLength;
     RegLocation rlArray = cUnit->regLocation[mir->dalvikInsn.vA];
@@ -3986,7 +3986,7 @@ static void genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir)
 static void genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir)
 {
     DecodedInstruction *dInsn = &mir->dalvikInsn;
-    const int lenOffset = offsetof(ArrayObject, length);
+    const int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
     const int regLength = dvmCompilerAllocTemp(cUnit);
     const int maxC = dInsn->arg[0];
     RegLocation rlArray = cUnit->regLocation[mir->dalvikInsn.vA];
@@ -4144,7 +4144,7 @@ static void handleExtendedMIR(CompilationUnit *cUnit, MIR *mir)
     strcpy(msg, extendedMIROpNames[opOffset]);
     newLIR1(cUnit, kArmPseudoExtended, (int) msg);
 
-    switch (mir->dalvikInsn.opcode) {
+    switch ((ExtendedMIROpcode)mir->dalvikInsn.opcode) {
         case kMirOpPhi: {
             char *ssaString = dvmCompilerGetSSAString(cUnit, mir->ssaRep);
             newLIR1(cUnit, kArmPseudoSSARep, (int) ssaString);
@@ -4247,6 +4247,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
     /* Used to hold the labels of each block */
     ArmLIR *labelList =
         (ArmLIR *) dvmCompilerNew(sizeof(ArmLIR) * cUnit->numBlocks, true);
+    ArmLIR *headLIR = NULL;
     GrowableList chainingListByType[kChainingCellGap];
     int i;
 
@@ -4374,15 +4375,12 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
             continue;
         }
 
-        ArmLIR *headLIR = NULL;
-        BasicBlock *nextBB = bb;
-
         /*
          * Try to build a longer optimization unit. Currently if the previous
          * block ends with a goto, we continue adding instructions and don't
          * reset the register allocation pool.
          */
-        for (; nextBB != NULL; nextBB = cUnit->nextCodegenBlock) {
+        for (BasicBlock *nextBB = bb; nextBB != NULL; nextBB = cUnit->nextCodegenBlock) {
             bb = nextBB;
             bb->visited = true;
             cUnit->nextCodegenBlock = NULL;
@@ -4398,16 +4396,15 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                     dvmCompilerResetDefTracking(cUnit);
                 }
 
-                if (mir->dalvikInsn.opcode >= kMirOpFirst) {
+                if ((int)mir->dalvikInsn.opcode >= (int)kMirOpFirst) {
                     handleExtendedMIR(cUnit, mir);
                     continue;
                 }
 
-
                 Opcode dalvikOpcode = mir->dalvikInsn.opcode;
                 InstructionFormat dalvikFormat =
                     dexGetFormatFromOpcode(dalvikOpcode);
-                char *note;
+                const char *note;
                 if (mir->OptimizationFlags & MIR_INLINED) {
                     note = " (I)";
                 } else if (mir->OptimizationFlags & MIR_INLINED_PRED) {
@@ -4701,7 +4698,7 @@ bool dvmCompilerDoWork(CompilerWorkOrder *work)
             break;
         }
         case kWorkOrderProfileMode:
-            dvmJitChangeProfileMode((TraceProfilingModes)work->info);
+            dvmJitChangeProfileMode((TraceProfilingModes)(int)work->info);
             isCompile = false;
             break;
         default:
diff --git a/vm/compiler/codegen/arm/FP/Thumb2VFP.c b/vm/compiler/codegen/arm/FP/Thumb2VFP.cpp
index 61698c2aa..aed4950a1 100644
--- a/vm/compiler/codegen/arm/FP/Thumb2VFP.c
+++ b/vm/compiler/codegen/arm/FP/Thumb2VFP.cpp
@@ -54,7 +54,8 @@ static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
     rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
     rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
     rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR3(cUnit, op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
+    newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg,
+            rlSrc2.lowReg);
     storeValue(cUnit, rlDest, rlResult);
     return false;
 }
@@ -100,7 +101,7 @@ static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
     rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
     assert(rlDest.wide);
     assert(rlResult.wide);
-    newLIR3(cUnit, op, S2D(rlResult.lowReg, rlResult.highReg),
+    newLIR3(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg),
             S2D(rlSrc1.lowReg, rlSrc1.highReg),
             S2D(rlSrc2.lowReg, rlSrc2.highReg));
     storeValueWide(cUnit, rlDest, rlResult);
@@ -169,12 +170,13 @@ static bool genConversion(CompilationUnit *cUnit, MIR *mir)
     if (longDest) {
         rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
         rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
-        newLIR2(cUnit, op, S2D(rlResult.lowReg, rlResult.highReg), srcReg);
+        newLIR2(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg),
+                srcReg);
         storeValueWide(cUnit, rlDest, rlResult);
     } else {
         rlDest = dvmCompilerGetDest(cUnit, mir, 0);
         rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true);
-        newLIR2(cUnit, op, rlResult.lowReg, srcReg);
+        newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcReg);
         storeValue(cUnit, rlDest, rlResult);
     }
     return false;
diff --git a/vm/compiler/codegen/arm/FP/ThumbPortableFP.c b/vm/compiler/codegen/arm/FP/ThumbPortableFP.cpp
index 7aac8e6d5..7aac8e6d5 100644
--- a/vm/compiler/codegen/arm/FP/ThumbPortableFP.c
+++ b/vm/compiler/codegen/arm/FP/ThumbPortableFP.cpp
diff --git a/vm/compiler/codegen/arm/FP/ThumbVFP.c b/vm/compiler/codegen/arm/FP/ThumbVFP.cpp
index f685f2469..f685f2469 100644
--- a/vm/compiler/codegen/arm/FP/ThumbVFP.c
+++ b/vm/compiler/codegen/arm/FP/ThumbVFP.cpp
diff --git a/vm/compiler/codegen/arm/GlobalOptimizations.c b/vm/compiler/codegen/arm/GlobalOptimizations.cpp
index e52bd8a49..e52bd8a49 100644
--- a/vm/compiler/codegen/arm/GlobalOptimizations.c
+++ b/vm/compiler/codegen/arm/GlobalOptimizations.cpp
diff --git a/vm/compiler/codegen/arm/LocalOptimizations.c b/vm/compiler/codegen/arm/LocalOptimizations.cpp
index ffeaa576f..ffeaa576f 100644
--- a/vm/compiler/codegen/arm/LocalOptimizations.c
+++ b/vm/compiler/codegen/arm/LocalOptimizations.cpp
diff --git a/vm/compiler/codegen/arm/README.txt b/vm/compiler/codegen/arm/README.txt
index a49eef891..1bb460379 100644
--- a/vm/compiler/codegen/arm/README.txt
+++ b/vm/compiler/codegen/arm/README.txt
@@ -8,26 +8,26 @@ components:
 --
 
 /* Architectural independent building blocks */
-#include "../CodegenCommon.c"
+#include "../CodegenCommon.cpp"
 
 /* Thumb2-specific factory utilities */
-#include "../Thumb2/Factory.c"
+#include "../Thumb2/Factory.cpp"
 /* Factory utilities dependent on arch-specific features */
-#include "../CodegenFactory.c"
+#include "../CodegenFactory.cpp"
 
 /* Thumb2-specific codegen routines */
-#include "../Thumb2/Gen.c"
+#include "../Thumb2/Gen.cpp"
 /* Thumb2+VFP codegen routines */
-#include "../FP/Thumb2VFP.c"
+#include "../FP/Thumb2VFP.cpp"
 
 /* Thumb2-specific register allocation */
-#include "../Thumb2/Ralloc.c"
+#include "../Thumb2/Ralloc.cpp"
 
 /* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../CodegenDriver.c"
+#include "../CodegenDriver.cpp"
 
 /* Architecture manifest */
-#include "ArchVariant.c"
+#include "ArchVariant.cpp"
 
 --
 
diff --git a/vm/compiler/codegen/arm/Thumb/Factory.c b/vm/compiler/codegen/arm/Thumb/Factory.cpp
index 7b51df160..7b51df160 100644
--- a/vm/compiler/codegen/arm/Thumb/Factory.c
+++ b/vm/compiler/codegen/arm/Thumb/Factory.cpp
diff --git a/vm/compiler/codegen/arm/Thumb/Gen.c b/vm/compiler/codegen/arm/Thumb/Gen.cpp
index 18ef76286..18ef76286 100644
--- a/vm/compiler/codegen/arm/Thumb/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb/Gen.cpp
diff --git a/vm/compiler/codegen/arm/Thumb/Ralloc.c b/vm/compiler/codegen/arm/Thumb/Ralloc.cpp
index 676997260..676997260 100644
--- a/vm/compiler/codegen/arm/Thumb/Ralloc.c
+++ b/vm/compiler/codegen/arm/Thumb/Ralloc.cpp
diff --git a/vm/compiler/codegen/arm/Thumb2/Factory.c b/vm/compiler/codegen/arm/Thumb2/Factory.cpp
index 80454508f..80454508f 100644
--- a/vm/compiler/codegen/arm/Thumb2/Factory.c
+++ b/vm/compiler/codegen/arm/Thumb2/Factory.cpp
diff --git a/vm/compiler/codegen/arm/Thumb2/Gen.c b/vm/compiler/codegen/arm/Thumb2/Gen.cpp
index f54b7eb49..fcf0fe34c 100644
--- a/vm/compiler/codegen/arm/Thumb2/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb2/Gen.cpp
@@ -165,7 +165,7 @@ void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
  * is not met.
  */
 static ArmLIR *genIT(CompilationUnit *cUnit, ArmConditionCode code,
-                     char *guide)
+                     const char *guide)
 {
     int mask;
     int condBit = code & 1;
diff --git a/vm/compiler/codegen/arm/Thumb2/Ralloc.c b/vm/compiler/codegen/arm/Thumb2/Ralloc.cpp
index 6adfd62a1..6adfd62a1 100644
--- a/vm/compiler/codegen/arm/Thumb2/Ralloc.c
+++ b/vm/compiler/codegen/arm/Thumb2/Ralloc.cpp
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
index 3d8505221..8ab956ec7 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+extern "C" void dvmCompilerTemplateStart(void);
+
 /*
  * This file is included by Codegen-armv5te-vfp.c, and implements architecture
  * variant-specific code.
@@ -28,16 +30,15 @@ JitInstructionSetType dvmCompilerInstructionSet(void)
     return DALVIK_JIT_THUMB;
 }
 
-/* Architecture-specific initializations and checks go here */
-bool dvmCompilerArchVariantInit(void)
-{
-    /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
-#define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
+/* First, declare dvmCompiler_TEMPLATE_XXX for each template */
+#define JIT_TEMPLATE(X) extern "C" void dvmCompiler_TEMPLATE_##X();
 #include "../../../template/armv5te-vfp/TemplateOpList.h"
 #undef JIT_TEMPLATE
 
+/* Architecture-specific initializations and checks go here */
+bool dvmCompilerArchVariantInit(void)
+{
     int i = 0;
-    extern void dvmCompilerTemplateStart(void);
 
     /*
      * Then, populate the templateEntryOffsets array with the offsets from the
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.h b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.h
index fa0121057..452f2a57d 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.h
+++ b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.h
@@ -19,7 +19,7 @@
 
 /* Create the TemplateOpcode enum */
 #define JIT_TEMPLATE(X) TEMPLATE_##X,
-typedef enum {
+enum TemplateOpcode {
 #include "../../../template/armv5te-vfp/TemplateOpList.h"
 /*
  * For example,
@@ -28,7 +28,7 @@ typedef enum {
  *     ...
  */
     TEMPLATE_LAST_MARK,
-} TemplateOpcode;
+};
 #undef JIT_TEMPLATE
 
 #endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H */
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c b/vm/compiler/codegen/arm/armv5te-vfp/Codegen.cpp
index a2d77eadb..55321bb9c 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/Codegen.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/Codegen.cpp
@@ -29,28 +29,28 @@
 #include "ArchVariant.h"
 
 /* Arm codegen building blocks */
-#include "../CodegenCommon.c"
+#include "../CodegenCommon.cpp"
 
 /* Thumb-specific factory utilities */
-#include "../Thumb/Factory.c"
+#include "../Thumb/Factory.cpp"
 /* Target independent factory utilities */
-#include "../../CodegenFactory.c"
+#include "../../CodegenFactory.cpp"
 /* Arm-specific factory utilities */
-#include "../ArchFactory.c"
+#include "../ArchFactory.cpp"
 
 /* Thumb-specific codegen routines */
-#include "../Thumb/Gen.c"
+#include "../Thumb/Gen.cpp"
 /* Thumb+VFP codegen routines */
-#include "../FP/ThumbVFP.c"
+#include "../FP/ThumbVFP.cpp"
 
 /* Thumb-specific register allocation */
-#include "../Thumb/Ralloc.c"
+#include "../Thumb/Ralloc.cpp"
 
 /* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../CodegenDriver.c"
+#include "../CodegenDriver.cpp"
 
 /* Dummy driver for method-based JIT */
-#include "../armv5te/MethodCodegenDriver.c"
+#include "../armv5te/MethodCodegenDriver.cpp"
 
 /* Architecture manifest */
-#include "ArchVariant.c"
+#include "ArchVariant.cpp"
diff --git a/vm/compiler/codegen/arm/armv5te/ArchVariant.c b/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
index 57a8c8a1d..3e13af5bf 100644
--- a/vm/compiler/codegen/arm/armv5te/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+extern "C" void dvmCompilerTemplateStart(void);
+
 /*
  * This file is included by Codegen-armv5te.c, and implements architecture
  * variant-specific code.
@@ -28,16 +30,15 @@ JitInstructionSetType dvmCompilerInstructionSet(void)
     return DALVIK_JIT_THUMB;
 }
 
-/* Architecture-specific initializations and checks go here */
-bool dvmCompilerArchVariantInit(void)
-{
-    /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
-#define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
+/* First, declare dvmCompiler_TEMPLATE_XXX for each template */
+#define JIT_TEMPLATE(X) extern "C" void dvmCompiler_TEMPLATE_##X();
 #include "../../../template/armv5te/TemplateOpList.h"
 #undef JIT_TEMPLATE
 
+/* Architecture-specific initializations and checks go here */
+bool dvmCompilerArchVariantInit(void)
+{
     int i = 0;
-    extern void dvmCompilerTemplateStart(void);
 
     /*
      * Then, populate the templateEntryOffsets array with the offsets from the
@@ -63,9 +64,9 @@ bool dvmCompilerArchVariantInit(void)
     /* Codegen-specific assumptions */
     assert(offsetof(ClassObject, vtable) < 128 &&
            (offsetof(ClassObject, vtable) & 0x3) == 0);
-    assert(offsetof(ArrayObject, length) < 128 &&
-           (offsetof(ArrayObject, length) & 0x3) == 0);
-    assert(offsetof(ArrayObject, contents) < 256);
+    assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
+           (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
 
     /* Up to 5 args are pushed on top of FP - sizeofStackSaveArea */
     assert(sizeof(StackSaveArea) < 236);
diff --git a/vm/compiler/codegen/arm/armv5te/ArchVariant.h b/vm/compiler/codegen/arm/armv5te/ArchVariant.h
index 4cc4fa643..07a1c8ccc 100644
--- a/vm/compiler/codegen/arm/armv5te/ArchVariant.h
+++ b/vm/compiler/codegen/arm/armv5te/ArchVariant.h
@@ -19,7 +19,7 @@
 
 /* Create the TemplateOpcode enum */
 #define JIT_TEMPLATE(X) TEMPLATE_##X,
-typedef enum {
+enum TemplateOpcode {
 #include "../../../template/armv5te/TemplateOpList.h"
 /*
  * For example,
@@ -28,7 +28,7 @@ typedef enum {
  *     ...
  */
     TEMPLATE_LAST_MARK,
-} TemplateOpcode;
+};
 #undef JIT_TEMPLATE
 
 #endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_ARCHVARIANT_H */
diff --git a/vm/compiler/codegen/arm/armv5te/Codegen.c b/vm/compiler/codegen/arm/armv5te/Codegen.cpp
index f74d968ca..a379c2a57 100644
--- a/vm/compiler/codegen/arm/armv5te/Codegen.c
+++ b/vm/compiler/codegen/arm/armv5te/Codegen.cpp
@@ -29,28 +29,28 @@
 #include "ArchVariant.h"
 
 /* Arm codegen building blocks */
-#include "../CodegenCommon.c"
+#include "../CodegenCommon.cpp"
 
 /* Thumb-specific building blocks */
-#include "../Thumb/Factory.c"
+#include "../Thumb/Factory.cpp"
 /* Target independent factory utilities */
-#include "../../CodegenFactory.c"
+#include "../../CodegenFactory.cpp"
 /* Arm-specific factory utilities */
-#include "../ArchFactory.c"
+#include "../ArchFactory.cpp"
 
 /* Thumb-specific codegen routines */
-#include "../Thumb/Gen.c"
+#include "../Thumb/Gen.cpp"
 /* Thumb+Portable FP codegen routines */
-#include "../FP/ThumbPortableFP.c"
+#include "../FP/ThumbPortableFP.cpp"
 
 /* Thumb-specific register allocation */
-#include "../Thumb/Ralloc.c"
+#include "../Thumb/Ralloc.cpp"
 
 /* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../CodegenDriver.c"
+#include "../CodegenDriver.cpp"
 
 /* Dummy driver for method-based JIT */
-#include "MethodCodegenDriver.c"
+#include "MethodCodegenDriver.cpp"
 
 /* Architecture manifest */
-#include "ArchVariant.c"
+#include "ArchVariant.cpp"
diff --git a/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.c b/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.cpp
index 20779f3e9..20779f3e9 100644
--- a/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.c
+++ b/vm/compiler/codegen/arm/armv5te/MethodCodegenDriver.cpp
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
index 59d7c95cd..d68d150da 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+extern "C" void dvmCompilerTemplateStart(void);
+
 /*
  * Determine the initial instruction set to be used for this trace.
  * Later components may decide to change this.
@@ -23,16 +25,15 @@ JitInstructionSetType dvmCompilerInstructionSet(void)
     return DALVIK_JIT_THUMB2;
 }
 
-/* Architecture-specific initializations and checks go here */
-bool dvmCompilerArchVariantInit(void)
-{
-    /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
-#define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
+/* First, declare dvmCompiler_TEMPLATE_XXX for each template */
+#define JIT_TEMPLATE(X) extern "C" void dvmCompiler_TEMPLATE_##X();
 #include "../../../template/armv5te-vfp/TemplateOpList.h"
 #undef JIT_TEMPLATE
 
+/* Architecture-specific initializations and checks go here */
+bool dvmCompilerArchVariantInit(void)
+{
     int i = 0;
-    extern void dvmCompilerTemplateStart(void);
 
     /*
      * Then, populate the templateEntryOffsets array with the offsets from the
@@ -58,9 +59,9 @@ bool dvmCompilerArchVariantInit(void)
     /* Codegen-specific assumptions */
     assert(offsetof(ClassObject, vtable) < 128 &&
            (offsetof(ClassObject, vtable) & 0x3) == 0);
-    assert(offsetof(ArrayObject, length) < 128 &&
-           (offsetof(ArrayObject, length) & 0x3) == 0);
-    assert(offsetof(ArrayObject, contents) < 256);
+    assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
+           (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
 
     /* Up to 5 args are pushed on top of FP - sizeofStackSaveArea */
     assert(sizeof(StackSaveArea) < 236);
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c b/vm/compiler/codegen/arm/armv7-a-neon/Codegen.cpp
index 439add5ef..8f151749c 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/Codegen.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/Codegen.cpp
@@ -29,28 +29,28 @@
 #include "ArchVariant.h"
 
 /* Arm codegen building blocks */
-#include "../CodegenCommon.c"
+#include "../CodegenCommon.cpp"
 
 /* Thumb2-specific factory utilities */
-#include "../Thumb2/Factory.c"
+#include "../Thumb2/Factory.cpp"
 /* Target indepedent factory utilities */
-#include "../../CodegenFactory.c"
+#include "../../CodegenFactory.cpp"
 /* Arm-specific factory utilities */
-#include "../ArchFactory.c"
+#include "../ArchFactory.cpp"
 
 /* Thumb2-specific codegen routines */
-#include "../Thumb2/Gen.c"
+#include "../Thumb2/Gen.cpp"
 /* Thumb2+VFP codegen routines */
-#include "../FP/Thumb2VFP.c"
+#include "../FP/Thumb2VFP.cpp"
 
 /* Thumb2-specific register allocation */
-#include "../Thumb2/Ralloc.c"
+#include "../Thumb2/Ralloc.cpp"
 
 /* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../CodegenDriver.c"
+#include "../CodegenDriver.cpp"
 
 /* Driver for method-based JIT */
-#include "MethodCodegenDriver.c"
+#include "MethodCodegenDriver.cpp"
 
 /* Architecture manifest */
-#include "ArchVariant.c"
+#include "ArchVariant.cpp"
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.c b/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
index 98d97d871..32065aebd 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
@@ -86,8 +86,8 @@ static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir,
     storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, method), method);
     /* thread->method = method */
     storeWordDisp(cUnit, r6SELF, offsetof(InterpSaveState, method), method);
-    /* thread->curFrame = current FP */
-    storeWordDisp(cUnit, r6SELF, offsetof(Thread, curFrame), r5FP);
+    /* thread->interpSave.curFrame = current FP */
+    storeWordDisp(cUnit, r6SELF, offsetof(Thread, interpSave.curFrame), r5FP);
     /* thread->methodClassDex = pDvmDex */
     storeWordDisp(cUnit, r6SELF, offsetof(InterpSaveState, methodClassDex),
                   pDvmDex);
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
index 59d7c95cd..d68d150da 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+extern "C" void dvmCompilerTemplateStart(void);
+
 /*
  * Determine the initial instruction set to be used for this trace.
  * Later components may decide to change this.
@@ -23,16 +25,15 @@ JitInstructionSetType dvmCompilerInstructionSet(void)
     return DALVIK_JIT_THUMB2;
 }
 
-/* Architecture-specific initializations and checks go here */
-bool dvmCompilerArchVariantInit(void)
-{
-    /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
-#define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
+/* First, declare dvmCompiler_TEMPLATE_XXX for each template */
+#define JIT_TEMPLATE(X) extern "C" void dvmCompiler_TEMPLATE_##X();
 #include "../../../template/armv5te-vfp/TemplateOpList.h"
 #undef JIT_TEMPLATE
 
+/* Architecture-specific initializations and checks go here */
+bool dvmCompilerArchVariantInit(void)
+{
     int i = 0;
-    extern void dvmCompilerTemplateStart(void);
 
     /*
      * Then, populate the templateEntryOffsets array with the offsets from the
@@ -58,9 +59,9 @@ bool dvmCompilerArchVariantInit(void)
     /* Codegen-specific assumptions */
     assert(offsetof(ClassObject, vtable) < 128 &&
            (offsetof(ClassObject, vtable) & 0x3) == 0);
-    assert(offsetof(ArrayObject, length) < 128 &&
-           (offsetof(ArrayObject, length) & 0x3) == 0);
-    assert(offsetof(ArrayObject, contents) < 256);
+    assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
+           (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
 
     /* Up to 5 args are pushed on top of FP - sizeofStackSaveArea */
     assert(sizeof(StackSaveArea) < 236);
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.h b/vm/compiler/codegen/arm/armv7-a/ArchVariant.h
index fa0121057..66e236b73 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.h
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.h
@@ -14,12 +14,12 @@
  * limitations under the License.
  */
 
-#ifndef _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H
-#define _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H
+#ifndef _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV7_A_ARCHVARIANT_H
+#define _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV7_A_ARCHVARIANT_H
 
 /* Create the TemplateOpcode enum */
 #define JIT_TEMPLATE(X) TEMPLATE_##X,
-typedef enum {
+enum TemplateOpcode {
 #include "../../../template/armv5te-vfp/TemplateOpList.h"
 /*
  * For example,
@@ -28,7 +28,7 @@ typedef enum {
  *     ...
  */
     TEMPLATE_LAST_MARK,
-} TemplateOpcode;
+};
 #undef JIT_TEMPLATE
 
-#endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV5TE_VFP_ARCHVARIANT_H */
+#endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_ARMV7_A_ARCHVARIANT_H */
diff --git a/vm/compiler/codegen/arm/armv7-a/Codegen.c b/vm/compiler/codegen/arm/armv7-a/Codegen.cpp
index 36771ef56..e1b0ee9a6 100644
--- a/vm/compiler/codegen/arm/armv7-a/Codegen.c
+++ b/vm/compiler/codegen/arm/armv7-a/Codegen.cpp
@@ -29,28 +29,28 @@
 #include "ArchVariant.h"
 
 /* Arm codegen building blocks */
-#include "../CodegenCommon.c"
+#include "../CodegenCommon.cpp"
 
 /* Thumb2-specific factory utilities */
-#include "../Thumb2/Factory.c"
+#include "../Thumb2/Factory.cpp"
 /* Target independent factory utilities */
-#include "../../CodegenFactory.c"
+#include "../../CodegenFactory.cpp"
 /* Arm-specific factory utilities */
-#include "../ArchFactory.c"
+#include "../ArchFactory.cpp"
 
 /* Thumb2-specific codegen routines */
-#include "../Thumb2/Gen.c"
+#include "../Thumb2/Gen.cpp"
 /* Thumb2+VFP codegen routines */
-#include "../FP/Thumb2VFP.c"
+#include "../FP/Thumb2VFP.cpp"
 
 /* Thumb2-specific register allocation */
-#include "../Thumb2/Ralloc.c"
+#include "../Thumb2/Ralloc.cpp"
 
 /* MIR2LIR dispatcher and architectural independent codegen routines */
-#include "../CodegenDriver.c"
+#include "../CodegenDriver.cpp"
 
 /* Driver for method-based JIT */
-#include "../armv7-a-neon/MethodCodegenDriver.c"
+#include "../armv7-a-neon/MethodCodegenDriver.cpp"
 
 /* Architecture manifest */
-#include "ArchVariant.c"
+#include "ArchVariant.cpp"