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authorjeffhao <jeffhao@google.com>2010-02-03 10:24:05 -0800
committerjeffhao <jeffhao@google.com>2010-02-04 15:26:00 -0800
commit9e45c0b968d63ea38353c99252d233879c2efdaf (patch)
treec73006a89afbfef530ba26f8cfd72a61bd235d5f /vm/compiler/codegen/arm/Thumb2
parent4fbba1f95b3e27bdc5f5572bb0420b5f928aa54e (diff)
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Made Self Verification mode's memory interface less intrusive.
Diffstat (limited to 'vm/compiler/codegen/arm/Thumb2')
-rw-r--r--vm/compiler/codegen/arm/Thumb2/Factory.c44
1 files changed, 38 insertions, 6 deletions
diff --git a/vm/compiler/codegen/arm/Thumb2/Factory.c b/vm/compiler/codegen/arm/Thumb2/Factory.c
index ea93bbf0b..433953ea2 100644
--- a/vm/compiler/codegen/arm/Thumb2/Factory.c
+++ b/vm/compiler/codegen/arm/Thumb2/Factory.c
@@ -660,6 +660,7 @@ static ArmLIR *loadBaseIndexed(CompilationUnit *cUnit, int rBase,
int rIndex, int rDest, int scale, OpSize size)
{
bool allLowRegs = LOWREG(rBase) && LOWREG(rIndex) && LOWREG(rDest);
+ ArmLIR *load;
ArmOpCode opCode = kThumbBkpt;
bool thumbForm = (allLowRegs && (scale == 0));
int regPtr;
@@ -683,7 +684,12 @@ static ArmLIR *loadBaseIndexed(CompilationUnit *cUnit, int rBase,
} else {
opRegRegReg(cUnit, kOpAdd, regPtr, rBase, rIndex);
}
- return newLIR3(cUnit, opCode, rDest, regPtr, 0);
+ load = newLIR3(cUnit, opCode, rDest, regPtr, 0);
+#if defined(WITH_SELF_VERIFICATION)
+ if (cUnit->heapMemOp)
+ load->branchInsertSV = true;
+#endif
+ return load;
case kWord:
opCode = (thumbForm) ? kThumbLdrRRR : kThumb2LdrRRR;
break;
@@ -703,15 +709,22 @@ static ArmLIR *loadBaseIndexed(CompilationUnit *cUnit, int rBase,
assert(0);
}
if (thumbForm)
- return newLIR3(cUnit, opCode, rDest, rBase, rIndex);
+ load = newLIR3(cUnit, opCode, rDest, rBase, rIndex);
else
- return newLIR4(cUnit, opCode, rDest, rBase, rIndex, scale);
+ load = newLIR4(cUnit, opCode, rDest, rBase, rIndex, scale);
+
+#if defined(WITH_SELF_VERIFICATION)
+ if (cUnit->heapMemOp)
+ load->branchInsertSV = true;
+#endif
+ return load;
}
static ArmLIR *storeBaseIndexed(CompilationUnit *cUnit, int rBase,
int rIndex, int rSrc, int scale, OpSize size)
{
bool allLowRegs = LOWREG(rBase) && LOWREG(rIndex) && LOWREG(rSrc);
+ ArmLIR *store;
ArmOpCode opCode = kThumbBkpt;
bool thumbForm = (allLowRegs && (scale == 0));
int regPtr;
@@ -735,7 +748,12 @@ static ArmLIR *storeBaseIndexed(CompilationUnit *cUnit, int rBase,
} else {
opRegRegReg(cUnit, kOpAdd, regPtr, rBase, rIndex);
}
- return newLIR3(cUnit, opCode, rSrc, regPtr, 0);
+ store = newLIR3(cUnit, opCode, rSrc, regPtr, 0);
+#if defined(WITH_SELF_VERIFICATION)
+ if (cUnit->heapMemOp)
+ store->branchInsertSV = true;
+#endif
+ return store;
case kWord:
opCode = (thumbForm) ? kThumbStrRRR : kThumb2StrRRR;
break;
@@ -751,9 +769,15 @@ static ArmLIR *storeBaseIndexed(CompilationUnit *cUnit, int rBase,
assert(0);
}
if (thumbForm)
- return newLIR3(cUnit, opCode, rSrc, rBase, rIndex);
+ store = newLIR3(cUnit, opCode, rSrc, rBase, rIndex);
else
- return newLIR4(cUnit, opCode, rSrc, rBase, rIndex, scale);
+ store = newLIR4(cUnit, opCode, rSrc, rBase, rIndex, scale);
+
+#if defined(WITH_SELF_VERIFICATION)
+ if (cUnit->heapMemOp)
+ store->branchInsertSV = true;
+#endif
+ return store;
}
/*
@@ -872,6 +896,10 @@ static ArmLIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase,
if (rBase == rFP) {
annotateDalvikRegAccess(load, displacement >> 2, true /* isLoad */);
}
+#if defined(WITH_SELF_VERIFICATION)
+ if (cUnit->heapMemOp)
+ load->branchInsertSV = true;
+#endif
return res;
}
@@ -982,6 +1010,10 @@ static ArmLIR *storeBaseDispBody(CompilationUnit *cUnit, int rBase,
if (rBase == rFP) {
annotateDalvikRegAccess(store, displacement >> 2, false /* isLoad */);
}
+#if defined(WITH_SELF_VERIFICATION)
+ if (cUnit->heapMemOp)
+ store->branchInsertSV = true;
+#endif
return res;
}