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| author | Serban Constantinescu <serban.constantinescu@arm.com> | 2013-11-11 15:48:31 +0000 |
|---|---|---|
| committer | David Butcher <david.butcher@arm.com> | 2013-12-19 18:31:51 +0000 |
| commit | 2d44d3f06d14ccf07fe612742c7e72c7887f574a (patch) | |
| tree | e1f35e22e8fc9ab030da1a05ecb3dafe35ed91df /vm/compiler/codegen/arm/Assemble.cpp | |
| parent | fb53ee4716b9121fbf684d84c321009cbb80ec6f (diff) | |
| download | android_dalvik-2d44d3f06d14ccf07fe612742c7e72c7887f574a.tar.gz android_dalvik-2d44d3f06d14ccf07fe612742c7e72c7887f574a.tar.bz2 android_dalvik-2d44d3f06d14ccf07fe612742c7e72c7887f574a.zip | |
Dalvik: Add sdiv support in the JIT
This patch adds hardware divide support in the JIT side of dalvik.
This operation is supported on new armv7 cpus such as A15 or A7.
The following opcodes are enabled and will generate code based using
SDIV instruction:
OP_DIV_INT
OP_DIV_INT_2ADDR
OP_REM_INT
OP_REM_INT_2ADDR
OP_DIV_INT_LIT16
OP_DIV_INT_LIT8
OP_REM_INT_LIT16
OP_REM_INT_LIT8
Change-Id: I2b2f9f337f13b5c794df951c4929b6ca0ad583c4
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Diffstat (limited to 'vm/compiler/codegen/arm/Assemble.cpp')
| -rw-r--r-- | vm/compiler/codegen/arm/Assemble.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/vm/compiler/codegen/arm/Assemble.cpp b/vm/compiler/codegen/arm/Assemble.cpp index 10572eb5f..d4707867e 100644 --- a/vm/compiler/codegen/arm/Assemble.cpp +++ b/vm/compiler/codegen/arm/Assemble.cpp @@ -847,11 +847,26 @@ ArmEncodingMap EncodingMap[kArmLast] = { kFmtBitBlt, 15, 12, IS_QUAD_OP | REG_DEF0 | REG_USE1 | REG_USE2 | REG_USE3, "mla", "r!0d, r!1d, r!2d, r!3d", 2), + ENCODING_MAP(kThumb2MlsRRRR, 0xfb000010, + kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, + kFmtBitBlt, 15, 12, + IS_QUAD_OP | REG_DEF0 | REG_USE1 | REG_USE2 | REG_USE3, + "mls", "r!0d, r!1d, r!2d, r!3d", 2), ENCODING_MAP(kThumb2Umull, 0xfba00000, kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | REG_USE3, "umull", "r!0d, r!1d, r!2d, r!3d", 2), + ENCODING_MAP(kThumb2SdivRRR, 0xfb90f0f0, + kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, + kFmtUnused, -1, -1, + IS_TERTIARY_OP | REG_DEF0_USE12, + "sdiv", "r!0d, r!1d, r!2d", 2), + ENCODING_MAP(kThumb2UdivRRR, 0xfbb0f0f0, + kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, + kFmtUnused, -1, -1, + IS_TERTIARY_OP | REG_DEF0 | REG_USE1 | REG_USE2, + "udiv", "r!0d, r!1d, r!2d", 2), ENCODING_MAP(kThumb2Ldrex, 0xe8500f00, kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD, |