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author | Ben Cheng <bccheng@android.com> | 2009-06-16 16:11:47 -0700 |
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committer | Ben Cheng <bccheng@android.com> | 2009-06-17 12:05:41 -0700 |
commit | e9695e5d281ad8bfbe3091e825befbedfc1b2007 (patch) | |
tree | afed365e12f32388bcd394974ed7b003530566e1 /vm/compiler/IntermediateRep.c | |
parent | 7c7e2c1e2c3f2ec9e82d28494c361609042c3561 (diff) | |
download | android_dalvik-e9695e5d281ad8bfbe3091e825befbedfc1b2007.tar.gz android_dalvik-e9695e5d281ad8bfbe3091e825befbedfc1b2007.tar.bz2 android_dalvik-e9695e5d281ad8bfbe3091e825befbedfc1b2007.zip |
Implemented peephole optimizations including null-check elimination, redundant ld/st elimination, ad-hoc register renaming and store sinking.
Diffstat (limited to 'vm/compiler/IntermediateRep.c')
-rw-r--r-- | vm/compiler/IntermediateRep.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/vm/compiler/IntermediateRep.c b/vm/compiler/IntermediateRep.c index 2596aab92..91b7af7ff 100644 --- a/vm/compiler/IntermediateRep.c +++ b/vm/compiler/IntermediateRep.c @@ -57,3 +57,21 @@ void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir) cUnit->lastLIRInsn = lir; } } + +/* + * Insert an LIR instruction before the current instruction, which cannot be the + * first instruction. + * + * prevLIR <-> newLIR <-> currentLIR + */ +void dvmCompilerInsertLIRBefore(LIR *currentLIR, LIR *newLIR) +{ + if (currentLIR->prev == NULL) + dvmAbort(); + LIR *prevLIR = currentLIR->prev; + + prevLIR->next = newLIR; + newLIR->prev = prevLIR; + newLIR->next = currentLIR; + currentLIR->prev = newLIR; +} |