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author | buzbee <buzbee@google.com> | 2011-05-03 12:55:14 -0700 |
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committer | buzbee <buzbee@google.com> | 2011-05-03 13:22:40 -0700 |
commit | 00ceb87d1c57ccee59966be4deef1292a049285c (patch) | |
tree | d9f3b0dc47d71e0742874e4ec420a73b2042e450 | |
parent | 7b609f056c6ac8727c4c91f3f6a4c03bd3c3ecd9 (diff) | |
download | android_dalvik-00ceb87d1c57ccee59966be4deef1292a049285c.tar.gz android_dalvik-00ceb87d1c57ccee59966be4deef1292a049285c.tar.bz2 android_dalvik-00ceb87d1c57ccee59966be4deef1292a049285c.zip |
Fix for double breakpoint (issue 4378296)
Breakpoints are given special handling in the interpreter. They
are first interpreted as a breakpoint (with notification to the
debugger), and then the actual instruction associated with the
breakpoint location is interpreted.
The bug here was that the "dvmCheckBefore()" handler was invoked
prior to both "interpretations" - rather than just the first.
Note that this defect appears only in the Arm mterp, the portable
interpreter and x86 mterp did the right thing.
Change-Id: Ied957edc0c248b5d4d94910beb7af6c03ffe885d
-rw-r--r-- | vm/mterp/armv5te/OP_BREAKPOINT.S | 3 | ||||
-rw-r--r-- | vm/mterp/out/InterpAsm-armv5te-vfp.S | 3 | ||||
-rw-r--r-- | vm/mterp/out/InterpAsm-armv5te.S | 3 | ||||
-rw-r--r-- | vm/mterp/out/InterpAsm-armv7-a-neon.S | 3 | ||||
-rw-r--r-- | vm/mterp/out/InterpAsm-armv7-a.S | 3 |
5 files changed, 10 insertions, 5 deletions
diff --git a/vm/mterp/armv5te/OP_BREAKPOINT.S b/vm/mterp/armv5te/OP_BREAKPOINT.S index 662227c4d..b4ea33342 100644 --- a/vm/mterp/armv5te/OP_BREAKPOINT.S +++ b/vm/mterp/armv5te/OP_BREAKPOINT.S @@ -9,6 +9,7 @@ mov r0, rPC bl dvmGetOriginalOpcode @ (rPC) FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst + ldr r1, [rSELF, #offThread_mainHandlerTable] and rINST, #0xff00 orr rINST, rINST, r0 - GOTO_OPCODE(r0) + GOTO_OPCODE_BASE(r1, r0) diff --git a/vm/mterp/out/InterpAsm-armv5te-vfp.S b/vm/mterp/out/InterpAsm-armv5te-vfp.S index 77be63855..d2880a439 100644 --- a/vm/mterp/out/InterpAsm-armv5te-vfp.S +++ b/vm/mterp/out/InterpAsm-armv5te-vfp.S @@ -7258,9 +7258,10 @@ dalvik_inst: mov r0, rPC bl dvmGetOriginalOpcode @ (rPC) FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst + ldr r1, [rSELF, #offThread_mainHandlerTable] and rINST, #0xff00 orr rINST, rINST, r0 - GOTO_OPCODE(r0) + GOTO_OPCODE_BASE(r1, r0) /* ------------------------------ */ .balign 64 diff --git a/vm/mterp/out/InterpAsm-armv5te.S b/vm/mterp/out/InterpAsm-armv5te.S index b46c3ee5e..edb5086a8 100644 --- a/vm/mterp/out/InterpAsm-armv5te.S +++ b/vm/mterp/out/InterpAsm-armv5te.S @@ -7580,9 +7580,10 @@ d2i_doconv: mov r0, rPC bl dvmGetOriginalOpcode @ (rPC) FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst + ldr r1, [rSELF, #offThread_mainHandlerTable] and rINST, #0xff00 orr rINST, rINST, r0 - GOTO_OPCODE(r0) + GOTO_OPCODE_BASE(r1, r0) /* ------------------------------ */ .balign 64 diff --git a/vm/mterp/out/InterpAsm-armv7-a-neon.S b/vm/mterp/out/InterpAsm-armv7-a-neon.S index 4694cf701..fa6402481 100644 --- a/vm/mterp/out/InterpAsm-armv7-a-neon.S +++ b/vm/mterp/out/InterpAsm-armv7-a-neon.S @@ -7216,9 +7216,10 @@ dalvik_inst: mov r0, rPC bl dvmGetOriginalOpcode @ (rPC) FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst + ldr r1, [rSELF, #offThread_mainHandlerTable] and rINST, #0xff00 orr rINST, rINST, r0 - GOTO_OPCODE(r0) + GOTO_OPCODE_BASE(r1, r0) /* ------------------------------ */ .balign 64 diff --git a/vm/mterp/out/InterpAsm-armv7-a.S b/vm/mterp/out/InterpAsm-armv7-a.S index 5a291f090..4f9b9740b 100644 --- a/vm/mterp/out/InterpAsm-armv7-a.S +++ b/vm/mterp/out/InterpAsm-armv7-a.S @@ -7216,9 +7216,10 @@ dalvik_inst: mov r0, rPC bl dvmGetOriginalOpcode @ (rPC) FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst + ldr r1, [rSELF, #offThread_mainHandlerTable] and rINST, #0xff00 orr rINST, rINST, r0 - GOTO_OPCODE(r0) + GOTO_OPCODE_BASE(r1, r0) /* ------------------------------ */ .balign 64 |