diff options
Diffstat (limited to 'libc/kernel/uapi/asm-mips/asm/inst.h')
| -rw-r--r-- | libc/kernel/uapi/asm-mips/asm/inst.h | 133 |
1 files changed, 69 insertions, 64 deletions
diff --git a/libc/kernel/uapi/asm-mips/asm/inst.h b/libc/kernel/uapi/asm-mips/asm/inst.h index 43e9a500c..c46d09b48 100644 --- a/libc/kernel/uapi/asm-mips/asm/inst.h +++ b/libc/kernel/uapi/asm-mips/asm/inst.h @@ -97,293 +97,298 @@ enum rt_op { enum cop_op { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mfc_op = 0x00, dmfc_op = 0x01, - cfc_op = 0x02, mtc_op = 0x04, - dmtc_op = 0x05, ctc_op = 0x06, - bc_op = 0x08, cop_op = 0x10, + cfc_op = 0x02, mfhc_op = 0x03, + mtc_op = 0x04, dmtc_op = 0x05, + ctc_op = 0x06, mthc_op = 0x07, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bc_op = 0x08, cop_op = 0x10, copm_op = 0x18 }; enum bcop_op { - bcf_op, bct_op, bcfl_op, bctl_op /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bcf_op, bct_op, bcfl_op, bctl_op }; enum cop0_coi_func { tlbr_op = 0x01, tlbwi_op = 0x02, - tlbwr_op = 0x06, tlbp_op = 0x08, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + tlbwr_op = 0x06, tlbp_op = 0x08, rfe_op = 0x10, eret_op = 0x18 }; enum cop0_com_func { - tlbr1_op = 0x01, tlbw_op = 0x02, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + tlbr1_op = 0x01, tlbw_op = 0x02, tlbp1_op = 0x08, dctr_op = 0x09, dctw_op = 0x0a }; -enum cop1_fmt { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum cop1_fmt { s_fmt, d_fmt, e_fmt, q_fmt, w_fmt, l_fmt }; -enum cop1_sdw_func { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum cop1_sdw_func { fadd_op = 0x00, fsub_op = 0x01, fmul_op = 0x02, fdiv_op = 0x03, fsqrt_op = 0x04, fabs_op = 0x05, - fmov_op = 0x06, fneg_op = 0x07, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + fmov_op = 0x06, fneg_op = 0x07, froundl_op = 0x08, ftruncl_op = 0x09, fceill_op = 0x0a, ffloorl_op = 0x0b, fround_op = 0x0c, ftrunc_op = 0x0d, - fceil_op = 0x0e, ffloor_op = 0x0f, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + fceil_op = 0x0e, ffloor_op = 0x0f, fmovc_op = 0x11, fmovz_op = 0x12, fmovn_op = 0x13, frecip_op = 0x15, frsqrt_op = 0x16, fcvts_op = 0x20, - fcvtd_op = 0x21, fcvte_op = 0x22, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + fcvtd_op = 0x21, fcvte_op = 0x22, fcvtw_op = 0x24, fcvtl_op = 0x25, fcmp_op = 0x30 }; -enum cop1x_func { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum cop1x_func { lwxc1_op = 0x00, ldxc1_op = 0x01, - pfetch_op = 0x07, swxc1_op = 0x08, - sdxc1_op = 0x09, madd_s_op = 0x20, - madd_d_op = 0x21, madd_e_op = 0x22, + swxc1_op = 0x08, sdxc1_op = 0x09, + pfetch_op = 0x0f, madd_s_op = 0x20, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + madd_d_op = 0x21, madd_e_op = 0x22, msub_s_op = 0x28, msub_d_op = 0x29, msub_e_op = 0x2a, nmadd_s_op = 0x30, nmadd_d_op = 0x31, nmadd_e_op = 0x32, - nmsub_s_op = 0x38, nmsub_d_op = 0x39, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + nmsub_s_op = 0x38, nmsub_d_op = 0x39, nmsub_e_op = 0x3a }; enum mad_func { - madd_fp_op = 0x08, msub_fp_op = 0x0a, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + madd_fp_op = 0x08, msub_fp_op = 0x0a, nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e }; enum lx_func { - lwx_op = 0x00, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + lwx_op = 0x00, lhx_op = 0x04, lbux_op = 0x06, ldx_op = 0x08, - lwux_op = 0x10, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + lwux_op = 0x10, lhux_op = 0x14, lbx_op = 0x16, }; -enum mm_major_op { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_major_op { mm_pool32a_op, mm_pool16a_op, mm_lbu16_op, mm_move16_op, mm_addi32_op, mm_lbu32_op, mm_sb32_op, mm_lb32_op, mm_pool32b_op, mm_pool16b_op, mm_lhu16_op, mm_andi16_op, - mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_addiu32_op, mm_lhu32_op, mm_sh32_op, mm_lh32_op, mm_pool32i_op, mm_pool16c_op, mm_lwsp16_op, mm_pool16d_op, mm_ori32_op, mm_pool32f_op, mm_reserved1_op, mm_reserved2_op, mm_pool32c_op, mm_lwgp16_op, mm_lw16_op, mm_pool16e_op, - mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_xori32_op, mm_jals32_op, mm_addiupc_op, mm_reserved3_op, mm_reserved4_op, mm_pool16f_op, mm_sb16_op, mm_beqz16_op, mm_slti32_op, mm_beq32_op, mm_swc132_op, mm_lwc132_op, mm_reserved5_op, mm_reserved6_op, mm_sh16_op, mm_bnez16_op, - mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_sltiu32_op, mm_bne32_op, mm_sdc132_op, mm_ldc132_op, mm_reserved7_op, mm_reserved8_op, mm_swsp16_op, mm_b16_op, mm_andi32_op, mm_j32_op, mm_sd32_op, mm_ld32_op, mm_reserved11_op, mm_reserved12_op, mm_sw16_op, mm_li16_op, - mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_jalx32_op, mm_jal32_op, mm_sw32_op, mm_lw32_op, }; enum mm_32i_minor_op { mm_bltz_op, mm_bltzal_op, mm_bgez_op, mm_bgezal_op, - mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_blez_op, mm_bnezc_op, mm_bgtz_op, mm_beqzc_op, mm_tlti_op, mm_tgei_op, mm_tltiu_op, mm_tgeiu_op, mm_tnei_op, mm_lui_op, mm_teqi_op, mm_reserved13_op, mm_synci_op, mm_bltzals_op, mm_reserved14_op, mm_bgezals_op, - mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_bc2f_op, mm_bc2t_op, mm_reserved15_op, mm_reserved16_op, mm_reserved17_op, mm_reserved18_op, mm_bposge64_op, mm_bposge32_op, mm_bc1f_op, mm_bc1t_op, mm_reserved19_op, mm_reserved20_op, mm_bc1any2f_op, mm_bc1any2t_op, mm_bc1any4f_op, mm_bc1any4t_op, -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; enum mm_32a_minor_op { mm_sll32_op = 0x000, mm_ins_op = 0x00c, - mm_ext_op = 0x02c, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_ext_op = 0x02c, mm_pool32axf_op = 0x03c, mm_srl32_op = 0x040, mm_sra_op = 0x080, - mm_rotr_op = 0x0c0, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_rotr_op = 0x0c0, mm_lwxs_op = 0x118, mm_addu32_op = 0x150, mm_subu32_op = 0x1d0, - mm_and_op = 0x250, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_and_op = 0x250, mm_or32_op = 0x290, mm_xor32_op = 0x310, }; -enum mm_32b_func { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_32b_func { mm_lwc2_func = 0x0, mm_lwp_func = 0x1, mm_ldc2_func = 0x2, - mm_ldp_func = 0x4, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_ldp_func = 0x4, mm_lwm32_func = 0x5, mm_cache_func = 0x6, mm_ldm_func = 0x7, - mm_swc2_func = 0x8, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_swc2_func = 0x8, mm_swp_func = 0x9, mm_sdc2_func = 0xa, mm_sdp_func = 0xc, - mm_swm32_func = 0xd, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_swm32_func = 0xd, mm_sdm_func = 0xf, }; enum mm_32c_func { - mm_pref_func = 0x2, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_pref_func = 0x2, mm_ll_func = 0x3, mm_swr_func = 0x9, mm_sc_func = 0xb, - mm_lwu_func = 0xe, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_lwu_func = 0xe, }; enum mm_32axf_minor_op { mm_mfc0_op = 0x003, - mm_mtc0_op = 0x00b, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_mtc0_op = 0x00b, mm_tlbp_op = 0x00d, mm_jalr_op = 0x03c, mm_tlbr_op = 0x04d, - mm_jalrhb_op = 0x07c, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_jalrhb_op = 0x07c, mm_tlbwi_op = 0x08d, mm_tlbwr_op = 0x0cd, mm_jalrs_op = 0x13c, - mm_jalrshb_op = 0x17c, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_jalrshb_op = 0x17c, mm_syscall_op = 0x22d, mm_eret_op = 0x3cd, }; -enum mm_32f_minor_op { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_32f_minor_op { mm_32f_00_op = 0x00, mm_32f_01_op = 0x01, mm_32f_02_op = 0x02, - mm_32f_10_op = 0x08, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_32f_10_op = 0x08, mm_32f_11_op = 0x09, mm_32f_12_op = 0x0a, mm_32f_20_op = 0x10, - mm_32f_30_op = 0x18, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_32f_30_op = 0x18, mm_32f_40_op = 0x20, mm_32f_41_op = 0x21, mm_32f_42_op = 0x22, - mm_32f_50_op = 0x28, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_32f_50_op = 0x28, mm_32f_51_op = 0x29, mm_32f_52_op = 0x2a, mm_32f_60_op = 0x30, - mm_32f_70_op = 0x38, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_32f_70_op = 0x38, mm_32f_73_op = 0x3b, mm_32f_74_op = 0x3c, }; -enum mm_32f_10_minor_op { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_32f_10_minor_op { mm_lwxc1_op = 0x1, mm_swxc1_op, mm_ldxc1_op, - mm_sdxc1_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_sdxc1_op, mm_luxc1_op, mm_suxc1_op, }; -enum mm_32f_func { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_32f_func { mm_lwxc1_func = 0x048, mm_swxc1_func = 0x088, mm_ldxc1_func = 0x0c8, - mm_sdxc1_func = 0x108, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_sdxc1_func = 0x108, }; enum mm_32f_40_minor_op { mm_fmovf_op, - mm_fmovt_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_fmovt_op, }; enum mm_32f_60_minor_op { mm_fadd_op, - mm_fsub_op, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_fsub_op, mm_fmul_op, mm_fdiv_op, }; -enum mm_32f_70_minor_op { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_32f_70_minor_op { mm_fmovn_op, mm_fmovz_op, }; -enum mm_32f_73_minor_op { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum mm_32f_73_minor_op { mm_fmov0_op = 0x01, mm_fcvtl_op = 0x04, mm_movf0_op = 0x05, - mm_frsqrt_op = 0x08, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_frsqrt_op = 0x08, mm_ffloorl_op = 0x0c, mm_fabs0_op = 0x0d, mm_fcvtw_op = 0x24, - mm_movt0_op = 0x25, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_movt0_op = 0x25, mm_fsqrt_op = 0x28, mm_ffloorw_op = 0x2c, mm_fneg0_op = 0x2d, - mm_cfc1_op = 0x40, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_cfc1_op = 0x40, mm_frecip_op = 0x48, mm_fceill_op = 0x4c, mm_fcvtd0_op = 0x4d, - mm_ctc1_op = 0x60, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_ctc1_op = 0x60, mm_fceilw_op = 0x6c, mm_fcvts0_op = 0x6d, mm_mfc1_op = 0x80, - mm_fmov1_op = 0x81, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_fmov1_op = 0x81, mm_movf1_op = 0x85, mm_ftruncl_op = 0x8c, mm_fabs1_op = 0x8d, - mm_mtc1_op = 0xa0, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_mtc1_op = 0xa0, mm_movt1_op = 0xa5, mm_ftruncw_op = 0xac, mm_fneg1_op = 0xad, - mm_froundl_op = 0xcc, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mm_mfhc1_op = 0xc0, + mm_froundl_op = 0xcc, mm_fcvtd1_op = 0xcd, + mm_mthc1_op = 0xe0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mm_froundw_op = 0xec, mm_fcvts1_op = 0xed, }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum mm_16c_minor_op { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ mm_lwm16_op = 0x04, mm_swm16_op = 0x05, - mm_jr16_op = 0x18, + mm_jr16_op = 0x0c, + mm_jrc_op = 0x0d, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - mm_jrc_op = 0x1a, - mm_jalr16_op = 0x1c, - mm_jalrs16_op = 0x1e, + mm_jalr16_op = 0x0e, + mm_jalrs16_op = 0x0f, + mm_jraddiusp_op = 0x18, }; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ enum mm_16d_minor_op { |